UCC2897A: UCC2897A Hardware Dbugging Problem

Hi Tracy,

Firstly, you have to correctly biased the TL431B , TL431B require a minimum cathode current for regulation, it is 0.7mA. So please parallel a 1K resistor on the opto-coupler diode. I don't know how you adjust the loop compensation that let you output voltage up to 100V but the FB voltage is still 3V.

One thought from my side is. since your BIAS2 voltage is around 9V.  the minimum cathode voltage of 431 is 2.5V , plus opto-coupler diode forward voltage ~1.2V.

we can get the Ib current through optocoupler is around 2.4mA , look to primary side , R31= 1k , If you want to pull FB voltage down to 0V in no load condition.

The CTR of opto-coupler should be >208% , I am not sure if all of components value demonstrated in the schematic are the same with your debug.

In other words , you can try to increase R31 from 1K to 2K , or decrease R28 from 2.2K to 1K .

The third , what's the purpose of C20 which parallel on cathode and anode of 431 ? can you try to remove it . as well as C19 ?

Attached a application notes for your reference , you can find the guideline of how to design loop compensation in it .

Thanks.

4863.Understanding and Designing an Active Clamp Current.pdf

Hi Tracy,

That is because the 431 chosen on the ucc2897A EVM board is TLV431B which minimum cathode current requirement is only 55~80uA.

Far less than TL431B required minimum cathode current. This minimum current can be provided through optocoupler diode even in heavy load condition.

Hope can answer your question.

Thanks.

Hi Tracy,

Since you are using diode for the rectifier on the secondary side. at light load condition, once the output inductance current decrease to zero . it entry DCM mode .there is a natural resonant between Lm and clamp capacitor . that is why you can find irregular shape on primary side .

once the load increase to can let power stage enter into CCM mode , you can find the regular shape as shown in your second waveform.

So I don't think any abnormal happens in your first waveform.

Thanks.

Hi Tracy,

You can try to increase clamp capacitance and minor decrease primary magnetizing inductance of transformer.

Thanks.

Hi Tracy,

Generally speaking ,  The MOSFET damage can be caused by over stress , including , voltage over stress/ current over stress / thermal over stress.

You have to capture the waveform when the MOSFET damaging , the voltage /current / and temperature .

Usually , the switching noise will be reflected on the output ripple , that is a normal behavior . make sure you have correctly measured the ripple since it maybe coupled noise from other channels you are tested at the same time , if you want to decrease the ripple , increase output capacitors volume is the most direct way. also parallel some MLCC on output.

Thanks.

Hi Tracy,

Can you capture a ripple waveform and tell us the test condition , such as input voltage / output voltage and output current.

please also capture the Main FET driver signal in the same waveform.

I observed the resistor PR25 in your schematic is 34Kohm , could you please try smaller value such as 2.2kohm .larger resistor may lead to low DC gain of compensation loop , lower DC gain can't suppress the noise from input. it maybe reflected on output ripple.

Thanks.

Hi Tracy,

After reviewed your ripple waveform , I guess you might made a mistake when you captured the ripple noise .

Can you use AC coupling to measure the ripple and make sure the GND loop of prober as smaller as possible.

Shown as in below image:

About your second question , I saw you raised in another post , please find the my answer in that post.

Thanks.

Hi Tracy,

The ripple in your waveform seems it's switching ripple, so please ignore my suggestion of adjust PR25.

It should not have a so large switching ripple on you output capacitors. Did you used my proposed method(shrink the prober GND loop ) to capture the ripple.

Or could you please show us a photo how did you capture the ripple and where is the test point on your board.

Another proposal for decrease the ripple is adding a LC filter on output.

Thanks. 

Hi Tracy,

I agree with you that it's a switching ripple . we can't eliminate it but only can mitigate it.

But firstly we must make sure it had been correctly measured and without any coupling from the bad PCB layout.

Here are two links I searched from internet which show you how to measure the ripple and how to improve it. you can check it one by one.

I guess you may know Chinese. Thanks.