TPS57114-Q1: TPS57114-Q1

Hello William Chen,

If I look on your picture I can see a variation of about 25ns of an average pulse duration of 120ns, so I would calculate a variation of the pulse width in the range of +/10%. So I cannot duplicate your calculation.

I also cannot understand the requirement for low jitter. This is a DCDC converter and duty cycle variations are required to regulate the output voltage, so this is basically an indication that the control loop is working. Of course, ideally at a steady state condition when all parameters are perfectly defined the duty cycle variation is zero. 

Anyway, as already mentioned the duty cycle variation is related to variations in load current and input voltage as well as to any noise coupled into the control circuit during operation. Anything which helps keeping the noise and the variations low will help lowering the variations of the duty cycle. 

Best regards,

Juergen

Juergen said:

Hello William Chen,

If I look on your picture I can see a variation of about 25ns of an average pulse duration of 120ns, so I would calculate a variation of the pulse width in the range of +/10%. So I cannot duplicate your calculation.

I also cannot understand the requirement for low jitter. This is a DCDC converter and duty cycle variations are required to regulate the output voltage, so this is basically an indication that the control loop is working. Of course, ideally at a steady state condition when all parameters are perfectly defined the duty cycle variation is zero. 

Anyway, as already mentioned the duty cycle variation is related to variations in load current and input voltage as well as to any noise coupled into the control circuit during operation. Anything which helps keeping the noise and the variations low will help lowering the variations of the duty cycle. 

Best regards,

Juergen

Hi my schematic comp value C =2.2nF,R=10K, i has been tune C=4.7nF , 8.2nF, R=9.09K,5.1k, test result still fail. freq=1.8MHz, can i tune to 1MHz? 

William,

You can use Webench to  get reasonable values for the components in the compensation network.

Which problem are you trying to solve?

Did you check the basic function of your circuit already? Is the output voltage regulated properly?

You did not post those waveforms. Noise issues are usually related to the design implementation, so PCB layout information would be helpful as well.

Best regards,

Juergen

Hi Juergen,

i want to tune jitter issue, basic circuit function is normal, ripple and transient is normal,Vout accuracy is normal too. 

i want to confirm the relationship between jitter, frequency and transient how to tune with you.

could you help us?

Hi William,

of course I can help, but I need more information to understand your problem and your design. As a first step, your target specification and the PCB layout of your design implementation would be helpful. 

If you are ok with the way the output voltage is regulated, what is the reason to try to further optimize the design?

Best regards,

Juergen