UCD3138: UCD3138 JTAG usage, after once JTAG is disabled

With the UCD3138 only, if it's in ROM mode, you need to write zeroes to the IOMUX register.  You can either use the memory debugger or use memory peek/poke to write zero to a 32 bit word at address FFF7F030.  All the other chips, if you go to ROM mode on reset, the JTAG will be enabled.  

If you're stuck in program flash mode with a valid checksum, and can't get to ROM mode, and your code doesn't enable JTAG, or offer any way to enable JTAG, you're stuck.  This is true of all chips.  It's called code security.  

It's why I seldom use the checksum during debugging.  And if I do, i verify that I can clear it before I set it.  

There is sort of a connection with the PWM output, but not very close.  

To disable the JTAG for code security, the IOMUX register is initialized by the hardware with a 2 in the JTAG_CLK_MUX bit field.  This actually enables SYNC on that JTAG clock pin. If there was a 3, that would enable PWM on that pin.  0, of course, enables the JTAG clock to that pin.  

That depends on which pinout you have.  On the 64 pin device, there are dedicated pins for both PWM0 and PWM1.

On the 40 pin device, there are no pins for PWM1, Using IOMUX, you can choose to put PWM0 out on either the TCK pin or the ADC_EXT_TRIG pin.  So if you want JTAG and PWM0, then you need to use the TCK pin for JTAG, and put PWM0 out on the ADC_EXT_TRIG.

Note that we generally use the PMBUS with memory debugger rather than JTAG. The UCD doesn't permit memory examination with JTAG without stopping the processor.  Stopping the processor is a bit dangerous with DC/DC topologies, and really dangerous with PFC.

If you look at the video training here:

https://training.ti.com/jp/ucd3138-digital-power-training-series

It will show you how to use the PMBus interface and the memory debugger.

The IOMUX register is described in the UCD3138 Technical Reference Manual here:

http://www.ti.com/lit/ug/sniu028a/sniu028a.pdf