LM3481: damaging pin 9 VCC of each LM3481 upon power cycle

Mateusz Stanislawski93

Part Number: LM3481

i was trying to do a design that is based on a web bench tool results for a SEPIC. unfortunately when i try to implement the design in real life i keep damaging pin 9 of each LM3481 after a power cycle. at the moment it does not matter if i wait a long time for pin to discharge or not. attached is the schematic from the webbench tool and the one i have build up. any feedback would be helpfull.

Vinmin = 10V, Vinmax = 30V, Vout = 24.5V, Ioutmax = 1.0A

there is a 10uF bulk at input not shown in the design.

24_5Vout_10to30Vin_1_0amps.pdf

over 4 years ago

0 Youhao Xi over 4 years ago

TI__Guru 73270 points

Hi Mateusz,

Thank you for designing with the LM3481. Is the attached schematic your complete schematic? No input and output capacitors?

Anyway, can you monitor DR, Vds of the FET, and also D1's anode voltages during operation? And also capture these waveforms when you recycle the power?

Thanks,

Youhao Xi, Applications Engineering

0 Yinsong Cai1 over 4 years ago

TI__Expert 7450 points

Hi Mateusz,

Thanks for your interest in LM3481.

Did you have the waveform for VCC?

Thanks,

Yinsong

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LM3481: damaging pin 9 VCC of each LM3481 upon power cycle