I have a customer that is looking at an architecture where there are two boards, a master and a slave. The master has a microprocessor and one LP5030. The slave has just the LP5030. The master routes an I2C port out to the slave. What if a transaction is interrupted and the I2C was in the middle of a transaction and the master board resets somehow? Or perhaps some kind of transient corrupts a data transfer? Does toggling the EN pin create a "reset" that would be equivilent to cycling power? Figure 15 in the datasheet appears to be saying that this would put the device back through the initiazation state in the same way that a power cycle would (thus IIC bus would be reset as well.) Is this a correct interpretation of figure 15? If this does not reset IIC logic how do we recommend getting the device on the "slave" board back to a state where communication is robust again.
Thank you for your consideration and attention to this question.
