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TLV803E: VDD range

Part Number: TLV803E

Hi,

Could you please confirm VDD range in datasheet explanation?

P1 shows
  • Ensured RESET/RESET for VDD = 0.7 V to 6 V

P6 shows 

Which information is correct for VDD range? I guess P1 information is incorrect..

Regards,
Nagata.

  • Hi Nagata-san,

    The /RESET | RESET pin is functional when VDD is above VPOR.  For the TLV803E, the VPOR is at 0.7V (max).

    I hope I have answered your question.  Please feel free to let me know if you have any other questions.  

    Ben

  • Ben,

    Thank you very much for your comment.

    Btw, Datasheet timing chart doesn't have the condition to set high in RESET pin after power up. Is the timing the tD time?

    Regards,
    Nagata.

  • Hi Nagata-san,

    During power-up, there is also a (tSTRT) time that is not shown in the waveform.  The tSTRT time is the time that the IC is "waking up".  Therefore, the total time when the /RESET pin goes high during power up is tSTRT + tD.  Depending on different conditions like VDD and temp, tSTRT should be less than 300uS.  Please see below.

    Ben