Is TI aware of any issues with the LM5113 Spice model when parasitic inductance is placed in series with the Vcc pin and the Vss pin. In my model I am attempting to account for parasitic inductance between the decoupling cap and the Vcc/ Vss pins. The circuit is running at 30 MHz. What I observe is if I place an inductance of > 2.5nH in series with these pins the output of the device fails to produce a proper square wave. When the inductance is <2.5nH the circuit works properly. .Any thoughts on this? Thanks
Mike Brand
310-647-3297