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Original question:

Compiler/TDA4VM: How to read or write PHY register data of main_r5f_0_0 on A72?

TDA4VM: How to read or write PHY register data of CPSW PHYs within Linux

Yannik Muendler
Prodigy 395 points

Part Number: TDA4VM

Hi,

How is it possible to read and write to PHY register via MDIO, which is connected to the CPSW with the ETHFW running on RTOS.
For example, the DP83867 on the GESI board.

When trying with the https://github.com/PieVo/mdio-tool the response is as following:

mdio-rool -e eth1 -r -p 0 -a 0

SIOCGMIIPHY on 'eth1' failed: Operation not supported

Thank you.

Yannik

 

  • +1
    TI__Mastermind 37435 points

    Hi,

    CPSW 9G is not under the control of Linux so there is no MDIO node and that's why this is failing. You need to run cpsw_mdio_config.gel in pdk/packages/ti/drv/enet/tools/debug_gels on MCU 2_0 to read the PHY registers.

    Alternatively if you do not have CCS and JTAG then you can use the cpsw_phyaccess_raw.c code at the same location and integrate those queries into Ethernet Firmware application running on MCU 2_0.

    Regards

    Vineet

  • 0 in reply to Vineet Roy
    TI__Prodigy 395 points

    Hi Vineet,

    thanks that is working for our use case.

    I noticed, that inside the functions phy_mmd_rd and phy_mmd_wr from cpsw_phyaccess_raw.c.

    The "mmd" read is not correct implemented. Currently where the mmd_number is given there should be the register

    and for 0x40xx there shoud be the mmd given

    currently it looks like this:

        cpsw_mdio_write(0x0D, 0x001F,phy_addr, baseAddr);
    cpsw_mdio_write(0x0E, mmd_number,phy_addr, baseAddr);
    cpsw_mdio_write(0x0D, 0x401F,phy_addr, baseAddr);
    reg=cpsw_mdio_read(0x0E, phy_addr, baseAddr);

    but it should look something like this:

        cpsw_mdio_write(0x0D, 0x001F,phy_addr, baseAddr);
	cpsw_mdio_write(0x0E, phy_register,phy_addr, baseAddr);
    cpsw_mdio_write(0x0D, 0x4000 + mmd_number, phy_addr, baseAddr);
    reg=cpsw_mdio_read(0x0E, phy_addr, baseAddr);

    Regards

    Yannik

  • 0 in reply to Yannik Muendler
    TI__Mastermind 37435 points

    Hi Yannik,

    Good to know that your problem is fixed.

    However the implementation is as per spec in https://www.ti.com/lit/ds/symlink/dp83867cr.pdf

    To read a register in the extended register set:

    1. Write the value 0x001F(address function field = 00, DEVAD= 31) to register REGCR.
    2. Write the desired register address to register ADDAR
    3. Write the value 0x401F (data,no post increment function field = 01, DEVAD= 31) to register REGCR
    4. Read the content of the desired extended register set register to register ADDAR

    Regards

    Vineet

  • 0 in reply to Vineet Roy
    TI__Prodigy 395 points

    Hi Vineet,

    Yes ok that seems to be ok for the DP83867. It seems to only have MMD = 1F.

    But when you look at:

    https://www.ti.com/lit/ds/symlink/dp83tg720s-q1.pdf

    7.4.15:

    1. Write the value 0x001F (address function field = 00, DEVAD = '11111') to register REGCR.

    2. Write the desired register address to register ADDAR.

    3. Write the value 0x401F (data, no post increment function field = 01, DEVAD = '11111') to register REGCR.

    4. Read the content of the desired extended register set in register ADDAR.

    and

    7.4.15.1:

    1. Write the value 0x0001 (address function field = 00, DEVAD = '00001') to register REGCR.

    2. Write the desired register address to register ADDAR.

    3. Write the value 0x4001 (data, no post increment function field = 01, DEVAD = '00001') to register REGCR.

    4. Read the content of the desired extended register set in register ADDAR

    I updated the function for our use case.

    But I think with the current implementation it will lead to no full support for different PHYs.

    Regards Yannik