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Original question:
Hi Mohmed,
We don't have exact example to connect decoder output to display. But you could use two examples and merge them.
Decoder example can be found in the file ti-processor-sdk-rtos-j721e-evm-07_01_00_11\tiovx\kernels_j7\hwa\test\test_video_encoder.c. the output of the display needs to be connected to display node to get it display. You could find display node's example in almost all vision apps examples.
Regards,
Brijesh
Dear Brijesh,
Thanks for your answers.
I have done what you said and apparently, it's working just fine with the default example: CBR_20mbps_HIGHSPEED_HP_CABAC.264. It does not when I want to make it work with another video. Please, confirm the steps that I am following or correct me if I am wrong:
1) Convert the video to H.264 (ffmpeg)
2) Create the bitstream sizes array (ffprobe)
3) Edit the dec_single_channel.cfg file
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#include <VX/vx.h>
#include <VX/vxu.h>
#include <TI/tivx.h>
#include <TI/j7.h>
#include "test_engine/test.h"
#include <string.h>
#include <stdio.h>
#include "tivx_utils_file_rd_wr.h"
#include "tivx_utils_checksum.h"
#include "test_hwa_common.h"
TESTCASE(tivxHwaVideoDecoder, CT_VXContext, ct_setup_vx_context, 0)
#define MAX_ABS_FILENAME (1024u)
#define MAX_ITERATIONS (4000u)
#define DUMP_DECODED_VIDEO_TO_FILE
TEST(tivxHwaVideoDecoder, testNodeCreation)
{
vx_context context = context_->vx_context_;
tivx_video_decoder_params_t params;
tivx_display_params_t display_params;
vx_user_data_object configuration_obj;
vx_user_data_object display_configuration_obj;
vx_user_data_object bitstream_obj;
uint32_t width = 256;
uint32_t height = 128;
vx_image output_image = NULL;
vx_graph graph = 0;
vx_node node_decode = 0;
vx_node node_display = 0;
// display initialization //
memset(&display_params, 0, sizeof(tivx_display_params_t));
display_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE;
display_params.pipeId = 2;
display_params.outWidth = 1280;
display_params.outHeight = 720;
display_params.posX = 0;
display_params.posY = 0;
//display_configuration_obj = vxCreateUserDataObject(context, "ti_display_params_t", sizeof(tivx_display_params_t), &display_params);
if (vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_VDEC1))
{
tivxHwaLoadKernels(context);
CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT);
tivx_video_decoder_params_init(¶ms);
ASSERT_VX_OBJECT(configuration_obj = vxCreateUserDataObject(context, "tivx_video_decoder_params_t", sizeof(tivx_video_decoder_params_t), NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(bitstream_obj = vxCreateUserDataObject(context, "video_bitstream", sizeof(uint8_t) * width * height * 3 / 2, NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
VX_CALL(vxCopyUserDataObject(configuration_obj, 0, sizeof(tivx_video_decoder_params_t), ¶ms, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
ASSERT_VX_OBJECT(output_image = vxCreateImage(context, width, height, VX_DF_IMAGE_NV12), VX_TYPE_IMAGE);
ASSERT_VX_OBJECT(graph = vxCreateGraph(context), VX_TYPE_GRAPH);
ASSERT_VX_OBJECT(node_decode = tivxVideoDecoderNode(graph,
configuration_obj,
bitstream_obj,
output_image), VX_TYPE_NODE);
// ASSERT_VX_OBJECT(node_display = tivxDisplayNode(graph,
// display_configuration_obj,
// output_image), VX_TYPE_NODE);
VX_CALL(vxSetNodeTarget(node_decode, VX_TARGET_STRING, TIVX_TARGET_VDEC1));
//VX_CALL(vxSetNodeTarget(node_display, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1));
VX_CALL(vxReleaseNode(&node_decode));
VX_CALL(vxReleaseGraph(&graph));
VX_CALL(vxReleaseImage(&output_image));
VX_CALL(vxReleaseUserDataObject(&bitstream_obj));
VX_CALL(vxReleaseUserDataObject(&configuration_obj));
ASSERT(node_decode == 0);
ASSERT(graph == 0);
ASSERT(output_image == 0);
ASSERT(bitstream_obj == 0);
ASSERT(configuration_obj == 0);
tivxHwaUnLoadKernels(context);
}
}
typedef struct stream_info {
uint32_t width;
uint32_t height;
uint32_t num_iterations;
char input_file[MAX_ABS_FILENAME - 32];
char output_file[MAX_ABS_FILENAME - 16];
vx_size bitstream_sizes[MAX_ITERATIONS];
} stream_info;
static char *read_config_file(char *cfg_file)
{
FILE *fd;
char *fcontent = NULL;
int filesize = 0, ret = 0;
fd = fopen(cfg_file, "r");
if (NULL == fd)
{
VX_PRINT(VX_ZONE_ERROR, "%s: file not found!!!\n", cfg_file);
return NULL;
}
ret = fseek(fd, 0, SEEK_END);
if (0 != ret)
{
VX_PRINT(VX_ZONE_ERROR, "fseek failed to find EOF\n");
goto error;
}
filesize = ftell(fd);
if (0 > filesize)
{
VX_PRINT(VX_ZONE_ERROR, "ftell failed to get file size\n");
goto error;
}
ret = fseek(fd, 0, SEEK_SET);
if (0 != ret)
{
VX_PRINT(VX_ZONE_ERROR, "fseek failed to find start of file\n");
goto error;
}
fcontent = (char*)ct_alloc_mem(filesize + 1);
if (NULL == fcontent)
{
VX_PRINT(VX_ZONE_ERROR, "ct_alloc_mem failed to allocate buffer\n");
goto error;
}
ret = fread(fcontent, sizeof(uint8_t), filesize, fd);
if (filesize != ret)
{
VX_PRINT(VX_ZONE_ERROR, "fread failed to read config file. read=%d != %d",
ret, filesize);
ct_free_mem(fcontent);
goto error;
}
fclose(fd);
fd = NULL;
fcontent[filesize] = '\0';
return fcontent;
error:
fclose(fd);
return NULL;
}
static uint8_t parse_config_file(char *cfg_file, struct stream_info *info)
{
char *fcontent = NULL, *substr = NULL, *str = NULL, *tok = NULL;
int i, ret = 0;
fcontent = read_config_file(cfg_file);
if (NULL == fcontent)
{
VX_PRINT(VX_ZONE_ERROR, "Failed to read config file 0\n");
return 1;
}
substr = "width=";
str = strstr(fcontent, substr);
if (str)
{
info->width = strtol(str + strlen(substr), NULL, 10);
if (0 == info->width)
{
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
} else {
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
substr = "height=";
str = strstr(fcontent, substr);
if (str)
{
info->height = strtol(str + strlen(substr), NULL, 10);
if (0 == info->height)
{
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
} else {
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
substr = "input_file=";
str = strstr(fcontent, substr);
if (str)
{
ret = sscanf(str + strlen(substr), "%s", info->input_file);
if (0 == ret || EOF == ret)
{
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
} else {
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
substr = "output_file=";
str = strstr(fcontent, substr);
if (str)
{
ret = sscanf(str + strlen(substr), "%s", info->output_file);
if (0 == ret || EOF == ret)
{
VX_PRINT(VX_ZONE_INFO, "Failed to find %s, using default.\n", substr);
info->output_file[0] = '\0';
}
} else {
VX_PRINT(VX_ZONE_INFO, "Failed to find %s, using default.\n", substr);
info->output_file[0] = '\0';
}
substr = "num_iterations=";
str = strstr(fcontent, substr);
if (str)
{
info->num_iterations = strtol(str + strlen(substr), NULL, 10);
if (0 == info->num_iterations)
{
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
if (info->num_iterations > MAX_ITERATIONS)
{
VX_PRINT(VX_ZONE_ERROR, "num_iterations > MAX_ITERATIONS. Please increase MAX_ITERATIONS and rebuild.\n");
goto error;
}
} else {
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
substr = "bitstream_sizes=";
str = strstr(fcontent, substr);
if (str)
{
/* Get substring between square brackets */
strtok(str, "[");
substr = strtok(NULL, "]");
tok = strtok(substr, ", \n");
for (i = 0; i < info->num_iterations; i++)
{
info->bitstream_sizes[i] = strtol(tok, NULL, 10);
tok = strtok(NULL, ", \n");
if (tok == NULL)
{
i++;
break;
}
}
if (i < info->num_iterations)
{
printf("Error: bitstream_sizes entries (%d) fewer than num_iterations=%d.\n", i, info->num_iterations);
goto error;
}
} else {
VX_PRINT(VX_ZONE_ERROR, "Failed to find %s\n", substr);
goto error;
}
ct_free_mem(fcontent);
return 0;
error:
ct_free_mem(fcontent);
return 1;
}
TEST(tivxHwaVideoDecoder, testSingleStreamProcessing)
{
vx_context context = context_->vx_context_;
tivx_video_decoder_params_t params;
tivx_display_params_t display_params;
vx_user_data_object configuration_obj;
vx_user_data_object display_configuration_obj;
uint8_t *bitstream;
vx_map_id map_id;
vx_user_data_object bitstream_obj;
char cfg_file[MAX_ABS_FILENAME];
char input_file[MAX_ABS_FILENAME];
char output_file[MAX_ABS_FILENAME];
struct stream_info info;
vx_size seek[MAX_ITERATIONS];
vx_image output_image = NULL;
vx_graph graph = 0;
vx_node node_decode = 0;
vx_node node_display = 0;
vx_status status = VX_SUCCESS;
FILE* in_fp = NULL;
FILE* out_fp = NULL;
size_t num_read;
int seek_status;
vx_rectangle_t rect_y;
vx_rectangle_t rect_uv;
vx_map_id map_id_image_y;
vx_imagepatch_addressing_t image_addr_y;
vx_map_id map_id_image_uv;
vx_imagepatch_addressing_t image_addr_uv;
uint8_t *data_ptr_y;
uint8_t *data_ptr_uv;
// display initialization //
memset(&display_params, 0, sizeof(tivx_display_params_t));
display_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE;
display_params.pipeId = 2;
display_params.outWidth = 1280;
display_params.outHeight = 720;
display_params.posX = 0;
display_params.posY = 0;
//display_configuration_obj = vxCreateUserDataObject(context, "ti_display_params_t", sizeof(tivx_display_params_t), &display_params);
#ifndef DUMP_DECODED_VIDEO_TO_FILE
const uint32_t checksum_expected[MAX_ITERATIONS] =
{
(uint32_t) 0x00000000, (uint32_t) 0x2bfbdee0, (uint32_t) 0xe3196ed0, (uint32_t) 0x9379a0c7, (uint32_t) 0xe333648e,
(uint32_t) 0x6ed450c0, (uint32_t) 0x0d7c4a1b, (uint32_t) 0xe0066589, (uint32_t) 0x7e8c561d, (uint32_t) 0x7e650c88,
(uint32_t) 0x325f31ea, (uint32_t) 0x7e3edc91, (uint32_t) 0x46673e46, (uint32_t) 0xfcf03832, (uint32_t) 0x5b04d299,
(uint32_t) 0xa1f04851, (uint32_t) 0x08cae540, (uint32_t) 0x45645f97, (uint32_t) 0x71fc3bc7, (uint32_t) 0x3944c01e,
(uint32_t) 0xa9678a1e, (uint32_t) 0x641d8854, (uint32_t) 0x176aecc9, (uint32_t) 0xa9d0d214, (uint32_t) 0xf94934a9,
(uint32_t) 0x767b9ff5, (uint32_t) 0xe5516dc4, (uint32_t) 0xf87d1455, (uint32_t) 0x0a15b3d4, (uint32_t) 0x97d2e210,
(uint32_t) 0xd3a9c07f, (uint32_t) 0x274f5dbc, (uint32_t) 0xb21571bb, (uint32_t) 0xcbe0cd91, (uint32_t) 0x6cf50261,
(uint32_t) 0xd3b1b4f5, (uint32_t) 0x8c1b0692, (uint32_t) 0xa245d049, (uint32_t) 0xdeb37b6d, (uint32_t) 0x8776a9b9,
(uint32_t) 0x20e095bc, (uint32_t) 0xb149cd5e, (uint32_t) 0x4a942ae1, (uint32_t) 0xbf49c02b, (uint32_t) 0x97a62841,
(uint32_t) 0x77def22d, (uint32_t) 0xb674ed59, (uint32_t) 0xdf547cd4, (uint32_t) 0x386ec685, (uint32_t) 0xb20577b4,
(uint32_t) 0xd4c8c817, (uint32_t) 0xe12bc569, (uint32_t) 0x02f62cb9, (uint32_t) 0xbc7ba9ee, (uint32_t) 0x62199b82,
(uint32_t) 0x4e5908ff, (uint32_t) 0xe1fce9ae, (uint32_t) 0xe2b0ae67, (uint32_t) 0xeb88e296, (uint32_t) 0x80ac66f9,
(uint32_t) 0x8b1ac922, (uint32_t) 0x3f18d8cd, (uint32_t) 0x4bf37a1f, (uint32_t) 0x104299a9, (uint32_t) 0x65365dad,
(uint32_t) 0xc5575e25, (uint32_t) 0x16b73bfa, (uint32_t) 0xcf58ec91, (uint32_t) 0x93e03f66, (uint32_t) 0xcaa143c8,
(uint32_t) 0xdb749858, (uint32_t) 0x67c796d9, (uint32_t) 0x34311efb, (uint32_t) 0x8d57e16a, (uint32_t) 0x9a4ebe56,
(uint32_t) 0x0c859c32, (uint32_t) 0x534f7892, (uint32_t) 0x4f06cc87, (uint32_t) 0x0ffc032b, (uint32_t) 0x05df69d1,
(uint32_t) 0xae218b7c, (uint32_t) 0xb3c6dca1, (uint32_t) 0x3483109f, (uint32_t) 0x8b6eeedf, (uint32_t) 0x7a835aea,
(uint32_t) 0xf032354b, (uint32_t) 0x9bf54769, (uint32_t) 0x8fffca86, (uint32_t) 0xb1cf3af5, (uint32_t) 0x9c2377f5,
(uint32_t) 0x81873955, (uint32_t) 0x9388a4d8, (uint32_t) 0x36b5c6fb, (uint32_t) 0x69de4b98, (uint32_t) 0xaced9db7,
(uint32_t) 0xcb2b4286, (uint32_t) 0xc43a743f, (uint32_t) 0x46afcd48, (uint32_t) 0x6444183a, (uint32_t) 0x4b3f8aff
};
uint32_t checksum_actual;
#endif
uint32_t i, j;
if (vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_VDEC1))
{
snprintf(cfg_file, MAX_ABS_FILENAME, "%s/tivx/video_decoder/dec_single_channel.cfg", ct_get_test_file_path());
if (parse_config_file(cfg_file, &info))
{
VX_PRINT(VX_ZONE_ERROR, "%s: Failed to parse config file\n", cfg_file);
ASSERT(0);
}
snprintf(input_file, MAX_ABS_FILENAME, "%s/tivx/video_decoder/%s", ct_get_test_file_path(), info.input_file);
if (0 != strlen(info.output_file))
snprintf(output_file, MAX_ABS_FILENAME, "%s/output/%s", ct_get_test_file_path(), info.output_file);
else
snprintf(output_file, MAX_ABS_FILENAME, "%s/output/decoder_output.yuv", ct_get_test_file_path());
rect_y.start_x = 0;
rect_y.start_y = 0;
rect_y.end_x = info.width;
rect_y.end_y = info.height;
rect_uv.start_x = 0;
rect_uv.start_y = 0;
rect_uv.end_x = info.width;
rect_uv.end_y = info.height / 2;
tivxHwaLoadKernels(context);
CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT);
seek[0] = 0;
for(i = 1; i < 100; i++)
{
seek[i] = seek[i - 1] + info.bitstream_sizes[i - 1];
}
tivx_video_decoder_params_init(¶ms);
ASSERT_VX_OBJECT(configuration_obj = vxCreateUserDataObject(context, "tivx_video_decoder_params_t", sizeof(tivx_video_decoder_params_t), NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(display_configuration_obj = vxCreateUserDataObject(context, "tivx_display_params_t", sizeof(tivx_display_params_t), NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(bitstream_obj = vxCreateUserDataObject(context, "video_bitstream", sizeof(uint8_t) * info.width * info.height * 3 / 2, NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
params.bitstream_format = TIVX_BITSTREAM_FORMAT_H264;
VX_CALL(vxCopyUserDataObject(configuration_obj, 0, sizeof(tivx_video_decoder_params_t), ¶ms, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
VX_CALL(vxCopyUserDataObject(display_configuration_obj, 0, sizeof(tivx_display_params_t), &display_params, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
ASSERT_VX_OBJECT(output_image = vxCreateImage(context, info.width, info.height, VX_DF_IMAGE_NV12), VX_TYPE_IMAGE);
ASSERT_VX_OBJECT(graph = vxCreateGraph(context), VX_TYPE_GRAPH);
ASSERT_VX_OBJECT(node_decode = tivxVideoDecoderNode(graph,
configuration_obj,
bitstream_obj,
output_image), VX_TYPE_NODE);
ASSERT_VX_OBJECT(node_display = tivxDisplayNode(graph,
display_configuration_obj,
output_image), VX_TYPE_NODE);
VX_CALL(vxSetNodeTarget(node_decode, VX_TARGET_STRING, TIVX_TARGET_VDEC1));
VX_CALL(vxSetNodeTarget(node_display, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1));
VX_CALL(vxVerifyGraph(graph));
for (i = 0; i < info.num_iterations; i++)
{
VX_CALL(vxMapUserDataObject(bitstream_obj, 0, info.bitstream_sizes[i], &map_id, (void*) &bitstream, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST, 0));
in_fp = fopen(input_file, "r");
if (NULL != in_fp)
{
seek_status = fseek(in_fp, seek[i], SEEK_SET);
if (0 == seek_status)
{
num_read = fread(bitstream, sizeof(uint8_t), info.bitstream_sizes[i], in_fp);
fclose(in_fp);
in_fp = NULL;
if (info.bitstream_sizes[i] != num_read)
{
VX_PRINT(VX_ZONE_INFO,"%s: Read less than expected!!!\n", input_file);
ASSERT(info.bitstream_sizes[i] == num_read);
}
}
else
{
fclose(in_fp);
in_fp = NULL;
VX_PRINT(VX_ZONE_ERROR,"%s: Seek failed!!!\n", input_file);
ASSERT(0 == seek_status);
}
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: Input file not found!!!\n", input_file);
ASSERT(NULL != in_fp);
}
VX_CALL(vxUnmapUserDataObject(bitstream_obj, map_id));
VX_CALL(tivxSetUserDataObjectAttribute(bitstream_obj, TIVX_USER_DATA_OBJECT_VALID_SIZE, (void*)&(info.bitstream_sizes[i]), sizeof(vx_size)));
VX_CALL(vxProcessGraph(graph));
#ifndef DUMP_DECODED_VIDEO_TO_FILE
checksum_actual = tivx_utils_simple_image_checksum(output_image, 0, rect_y);
ASSERT(checksum_expected[i] == checksum_actual);
rect_uv = rect_uv; /* dummy instruction to avoid compiler error. will be fixed with updated checksum API which can check for UV plane as well */
#else
VX_CALL(vxMapImagePatch(output_image,
&rect_y,
0,
&map_id_image_y,
&image_addr_y,
(void**) &data_ptr_y,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
VX_CALL(vxMapImagePatch(output_image,
&rect_uv,
1,
&map_id_image_uv,
&image_addr_uv,
(void**) &data_ptr_uv,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
if (i < 5)
{
out_fp = fopen(output_file, "ab");
if (NULL != out_fp)
{
for(j = 0; j < info.height; j++)
{
num_read = fwrite(data_ptr_y + (j * image_addr_y.stride_y), sizeof(uint8_t), info.width, out_fp);
}
for(j = 0; j < (info.height / 2); j++)
{
num_read += fwrite(data_ptr_uv + (j * image_addr_uv.stride_y), sizeof(uint8_t), info.width, out_fp);
}
fclose(out_fp);
out_fp = NULL;
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: output file not found!!!\n", output_file);
ASSERT(NULL != out_fp);
}
}
VX_CALL(vxUnmapImagePatch(output_image, map_id_image_y));
VX_CALL(vxUnmapImagePatch(output_image, map_id_image_uv));
#endif
}
VX_CALL(vxReleaseNode(&node_decode));
VX_CALL(vxReleaseNode(&node_display));
VX_CALL(vxReleaseGraph(&graph));
VX_CALL(vxReleaseImage(&output_image));
VX_CALL(vxReleaseUserDataObject(&bitstream_obj));
VX_CALL(vxReleaseUserDataObject(&configuration_obj));
VX_CALL(vxReleaseUserDataObject(&display_configuration_obj));
ASSERT(node_decode == 0);
ASSERT(node_display == 0);
ASSERT(graph == 0);
ASSERT(output_image == 0);
ASSERT(bitstream_obj == 0);
ASSERT(configuration_obj == 0);
ASSERT(display_configuration_obj == 0);
tivxHwaUnLoadKernels(context);
}
}
typedef struct {
const char* name;
int mode;
} Arg_MultiStream;
#define DECODER_PARAMETERS \
CT_GENERATE_PARAMETERS("serial", ARG, 0), \
CT_GENERATE_PARAMETERS("parallel", ARG, 1)
TEST_WITH_ARG(tivxHwaVideoDecoder, testMultiStreamProcessing, Arg_MultiStream, DECODER_PARAMETERS)
{
vx_context context = context_->vx_context_;
tivx_video_decoder_params_t params_s;
tivx_video_decoder_params_t params_l;
vx_user_data_object configuration_obj_s;
vx_user_data_object configuration_obj_l;
uint8_t *bitstream_s;
uint8_t *bitstream_l;
vx_map_id map_id_s;
vx_map_id map_id_l;
vx_user_data_object bitstream_obj_s;
vx_user_data_object bitstream_obj_l;
vx_size seek_s[MAX_ITERATIONS];
vx_size seek_l[MAX_ITERATIONS];
vx_image output_image_s = NULL;
vx_image output_image_l = NULL;
vx_graph graph = 0;
vx_node node_decode_s = 0;
vx_node node_decode_l = 0;
vx_status status = VX_SUCCESS;
char cfg_file[MAX_ABS_FILENAME];
struct stream_info info_s;
struct stream_info info_l;
int iterations;
char input_file_s[MAX_ABS_FILENAME];
char input_file_l[MAX_ABS_FILENAME];
FILE* in_fp = NULL;
char output_file_s[MAX_ABS_FILENAME];
char output_file_l[MAX_ABS_FILENAME];
FILE* out_fp_s = NULL;
FILE* out_fp_l = NULL;
size_t num_read;
int seek_status;
#ifndef DUMP_DECODED_VIDEO_TO_FILE
const uint32_t checksum_expected_s[MAX_ITERATIONS] =
{
(uint32_t) 0x00000000, (uint32_t) 0x2bfbdee0, (uint32_t) 0xe3196ed0, (uint32_t) 0x9379a0c7, (uint32_t) 0xe333648e,
(uint32_t) 0x6ed450c0, (uint32_t) 0x0d7c4a1b, (uint32_t) 0xe0066589, (uint32_t) 0x7e8c561d, (uint32_t) 0x7e650c88,
(uint32_t) 0x325f31ea, (uint32_t) 0x7e3edc91, (uint32_t) 0x46673e46, (uint32_t) 0xfcf03832, (uint32_t) 0x5b04d299,
(uint32_t) 0xa1f04851, (uint32_t) 0x08cae540, (uint32_t) 0x45645f97, (uint32_t) 0x71fc3bc7, (uint32_t) 0x3944c01e,
(uint32_t) 0xa9678a1e, (uint32_t) 0x641d8854, (uint32_t) 0x176aecc9, (uint32_t) 0xa9d0d214, (uint32_t) 0xf94934a9,
(uint32_t) 0x767b9ff5, (uint32_t) 0xe5516dc4, (uint32_t) 0xf87d1455, (uint32_t) 0x0a15b3d4, (uint32_t) 0x97d2e210,
(uint32_t) 0xd3a9c07f, (uint32_t) 0x274f5dbc, (uint32_t) 0xb21571bb, (uint32_t) 0xcbe0cd91, (uint32_t) 0x6cf50261,
(uint32_t) 0xd3b1b4f5, (uint32_t) 0x8c1b0692, (uint32_t) 0xa245d049, (uint32_t) 0xdeb37b6d, (uint32_t) 0x8776a9b9,
(uint32_t) 0x20e095bc, (uint32_t) 0xb149cd5e, (uint32_t) 0x4a942ae1, (uint32_t) 0xbf49c02b, (uint32_t) 0x97a62841,
(uint32_t) 0x77def22d, (uint32_t) 0xb674ed59, (uint32_t) 0xdf547cd4, (uint32_t) 0x386ec685, (uint32_t) 0xb20577b4,
(uint32_t) 0xd4c8c817, (uint32_t) 0xe12bc569, (uint32_t) 0x02f62cb9, (uint32_t) 0xbc7ba9ee, (uint32_t) 0x62199b82,
(uint32_t) 0x4e5908ff, (uint32_t) 0xe1fce9ae, (uint32_t) 0xe2b0ae67, (uint32_t) 0xeb88e296, (uint32_t) 0x80ac66f9,
(uint32_t) 0x8b1ac922, (uint32_t) 0x3f18d8cd, (uint32_t) 0x4bf37a1f, (uint32_t) 0x104299a9, (uint32_t) 0x65365dad,
(uint32_t) 0xc5575e25, (uint32_t) 0x16b73bfa, (uint32_t) 0xcf58ec91, (uint32_t) 0x93e03f66, (uint32_t) 0xcaa143c8,
(uint32_t) 0xdb749858, (uint32_t) 0x67c796d9, (uint32_t) 0x34311efb, (uint32_t) 0x8d57e16a, (uint32_t) 0x9a4ebe56,
(uint32_t) 0x0c859c32, (uint32_t) 0x534f7892, (uint32_t) 0x4f06cc87, (uint32_t) 0x0ffc032b, (uint32_t) 0x05df69d1,
(uint32_t) 0xae218b7c, (uint32_t) 0xb3c6dca1, (uint32_t) 0x3483109f, (uint32_t) 0x8b6eeedf, (uint32_t) 0x7a835aea,
(uint32_t) 0xf032354b, (uint32_t) 0x9bf54769, (uint32_t) 0x8fffca86, (uint32_t) 0xb1cf3af5, (uint32_t) 0x9c2377f5,
(uint32_t) 0x81873955, (uint32_t) 0x9388a4d8, (uint32_t) 0x36b5c6fb, (uint32_t) 0x69de4b98, (uint32_t) 0xaced9db7,
(uint32_t) 0xcb2b4286, (uint32_t) 0xc43a743f, (uint32_t) 0x46afcd48, (uint32_t) 0x6444183a, (uint32_t) 0x4b3f8aff
};
const uint32_t checksum_expected_l[MAX_ITERATIONS] =
{
(uint32_t) 0x00000000, (uint32_t) 0xc69403ee, (uint32_t) 0x48304f53, (uint32_t) 0xa689da58, (uint32_t) 0x142cc7e8,
(uint32_t) 0x0bb00265, (uint32_t) 0x1ca65968, (uint32_t) 0x14f8e97b, (uint32_t) 0xd8ed5ade, (uint32_t) 0x2968c214,
(uint32_t) 0x177ebb3b, (uint32_t) 0xbe911160, (uint32_t) 0x6e7a5a5b, (uint32_t) 0x0e870dee, (uint32_t) 0x87723dbe,
(uint32_t) 0xb247524b, (uint32_t) 0x91ebdfe9, (uint32_t) 0xb71b7b19, (uint32_t) 0x832e4d79, (uint32_t) 0xbb85e856,
(uint32_t) 0x46ece964, (uint32_t) 0x18489694, (uint32_t) 0x7c31bb1c, (uint32_t) 0xe37f0d6f, (uint32_t) 0xa809f28f,
(uint32_t) 0xa01ab621, (uint32_t) 0x3219c8ce, (uint32_t) 0x9a71e234, (uint32_t) 0x5e61b531, (uint32_t) 0x6ad0b747,
(uint32_t) 0xd81df077, (uint32_t) 0x0e57b192, (uint32_t) 0xbefde0ba, (uint32_t) 0xb4f869ff, (uint32_t) 0x7b0e6984,
(uint32_t) 0x8a9d3d47, (uint32_t) 0x0dfa7be2, (uint32_t) 0xc082ee38, (uint32_t) 0xacbbf9cb, (uint32_t) 0x8070daa6,
(uint32_t) 0xfe353f34, (uint32_t) 0xbef72049, (uint32_t) 0xb9999d76, (uint32_t) 0x37a4501a, (uint32_t) 0xc5e2d9ab,
(uint32_t) 0xe7f4eed1, (uint32_t) 0x1e23f43b, (uint32_t) 0x3143aa98, (uint32_t) 0xfcea2606, (uint32_t) 0xa0ab381e,
(uint32_t) 0x7e6a428d, (uint32_t) 0xbd591530, (uint32_t) 0x9ab8f9c3, (uint32_t) 0x38028b19, (uint32_t) 0x7e5e0576,
(uint32_t) 0x27cab807, (uint32_t) 0xa0594d72, (uint32_t) 0x7eb74321, (uint32_t) 0xc9fb99a6, (uint32_t) 0xb921e743,
(uint32_t) 0x21a12254, (uint32_t) 0xf07ca1c5, (uint32_t) 0x77818990, (uint32_t) 0x893b2a37, (uint32_t) 0xe1f9a78f,
(uint32_t) 0xf835b12a, (uint32_t) 0x5e5efbf0, (uint32_t) 0x5f648969, (uint32_t) 0xc5249f2f, (uint32_t) 0xde700e75,
(uint32_t) 0x8efe94ef, (uint32_t) 0xaaaefae9, (uint32_t) 0x4099fd8c, (uint32_t) 0x9e82d475, (uint32_t) 0xb389062c,
(uint32_t) 0x8d8728c3, (uint32_t) 0xcb75799c, (uint32_t) 0x9693fdce, (uint32_t) 0xa1dbd67c, (uint32_t) 0xd9ef6152,
(uint32_t) 0xeb524a50, (uint32_t) 0xa8ac78ae, (uint32_t) 0xd01a8a01, (uint32_t) 0x1098752d, (uint32_t) 0xf77b2a0c,
(uint32_t) 0x06290110, (uint32_t) 0x9eebb207, (uint32_t) 0x7b7011ae, (uint32_t) 0xa1224fbf, (uint32_t) 0x13137366,
(uint32_t) 0xd033f6b4, (uint32_t) 0x8ed8552a, (uint32_t) 0x2f0eb228, (uint32_t) 0x46ec6ae1, (uint32_t) 0x3109240b,
(uint32_t) 0x56b11b91, (uint32_t) 0xe777fcd6, (uint32_t) 0xe4c4575e, (uint32_t) 0x07cf5691, (uint32_t) 0xf5ab0eb1
};
uint32_t checksum_actual_s;
uint32_t checksum_actual_l;
#endif
vx_rectangle_t rect_y_s;
vx_rectangle_t rect_uv_s;
vx_map_id map_id_image_y_s;
vx_imagepatch_addressing_t image_addr_y_s;
vx_map_id map_id_image_uv_s;
vx_imagepatch_addressing_t image_addr_uv_s;
uint8_t *data_ptr_y_s;
uint8_t *data_ptr_uv_s;
vx_rectangle_t rect_y_l;
vx_rectangle_t rect_uv_l;
vx_map_id map_id_image_y_l;
vx_imagepatch_addressing_t image_addr_y_l;
vx_map_id map_id_image_uv_l;
vx_imagepatch_addressing_t image_addr_uv_l;
uint8_t *data_ptr_y_l;
uint8_t *data_ptr_uv_l;
uint32_t i, j;
uint32_t exe_time[MAX_ITERATIONS];
uint64_t timestamp = 0;
char *second_target = TIVX_TARGET_VDEC1;
uint32_t expected_time_median = 29000;
if (arg_->mode == 1)
{
/* Run both VENC instances in parallel */
second_target = TIVX_TARGET_VDEC2;
expected_time_median = 23000;
}
if ((vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_VDEC1)) && (vx_true_e == tivxIsTargetEnabled(second_target)))
{
snprintf(cfg_file, MAX_ABS_FILENAME, "%s/tivx/video_decoder/dec_multi_channel_0.cfg", ct_get_test_file_path());
if (parse_config_file(cfg_file, &info_s))
{
VX_PRINT(VX_ZONE_ERROR, "%s: Failed to parse config file 0\n", cfg_file);
ASSERT(0);
}
snprintf(cfg_file, MAX_ABS_FILENAME, "%s/tivx/video_decoder/dec_multi_channel_1.cfg", ct_get_test_file_path());
if (parse_config_file(cfg_file, &info_l))
{
VX_PRINT(VX_ZONE_ERROR, "%s: Failed to parse config file 1\n", cfg_file);
ASSERT(0);
}
snprintf(input_file_s, MAX_ABS_FILENAME, "%s/tivx/video_decoder/%s", ct_get_test_file_path(), info_s.input_file);
snprintf(input_file_l, MAX_ABS_FILENAME, "%s/tivx/video_decoder/%s", ct_get_test_file_path(), info_l.input_file);
if (0 != strlen(info_s.output_file))
snprintf(output_file_s, MAX_ABS_FILENAME, "%s/output/%s", ct_get_test_file_path(), info_s.output_file);
else
snprintf(output_file_s, MAX_ABS_FILENAME, "%s/output/decoder_output_0.yuv", ct_get_test_file_path());
if (0 != strlen(info_l.output_file))
snprintf(output_file_l, MAX_ABS_FILENAME, "%s/output/%s", ct_get_test_file_path(), info_l.output_file);
else
snprintf(output_file_l, MAX_ABS_FILENAME, "%s/output/decoder_output_1.yuv", ct_get_test_file_path());
iterations = (info_s.num_iterations < info_l.num_iterations) ? info_s.num_iterations : info_l.num_iterations;
rect_y_s.start_x = 0;
rect_y_s.start_y = 0;
rect_y_s.end_x = info_s.width;
rect_y_s.end_y = info_s.height;
rect_uv_s.start_x = 0;
rect_uv_s.start_y = 0;
rect_uv_s.end_x = info_s.width;
rect_uv_s.end_y = info_s.height;
rect_y_l.start_x = 0;
rect_y_l.start_y = 0;
rect_y_l.end_x = info_l.width;
rect_y_l.end_y = info_l.height;
rect_uv_l.start_x = 0;
rect_uv_l.start_y = 0;
rect_uv_l.end_x = info_l.width;
rect_uv_l.end_y = info_l.height;
tivxHwaLoadKernels(context);
CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT);
seek_s[0] = 0;
seek_l[0] = 0;
for(i = 1; i < 100; i++)
{
seek_s[i] = seek_s[i - 1] + info_s.bitstream_sizes[i - 1];
seek_l[i] = seek_l[i - 1] + info_l.bitstream_sizes[i - 1];
}
tivx_video_decoder_params_init(¶ms_s);
tivx_video_decoder_params_init(¶ms_l);
ASSERT_VX_OBJECT(configuration_obj_s = vxCreateUserDataObject(context, "tivx_video_decoder_params_t", sizeof(tivx_video_decoder_params_t), NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(configuration_obj_l = vxCreateUserDataObject(context, "tivx_video_decoder_params_t", sizeof(tivx_video_decoder_params_t), NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(bitstream_obj_s = vxCreateUserDataObject(context, "video_bitstream", sizeof(uint8_t) * info_s.width * info_s.height * 3 / 2, NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
ASSERT_VX_OBJECT(bitstream_obj_l = vxCreateUserDataObject(context, "video_bitstream", sizeof(uint8_t) * info_l.width * info_l.height * 3 / 2, NULL), (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT);
params_s.bitstream_format = TIVX_BITSTREAM_FORMAT_H264;
params_l.bitstream_format = TIVX_BITSTREAM_FORMAT_H264;
VX_CALL(vxCopyUserDataObject(configuration_obj_s, 0, sizeof(tivx_video_decoder_params_t), ¶ms_s, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
VX_CALL(vxCopyUserDataObject(configuration_obj_l, 0, sizeof(tivx_video_decoder_params_t), ¶ms_l, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
ASSERT_VX_OBJECT(output_image_s = vxCreateImage(context, info_s.width, info_s.height, VX_DF_IMAGE_NV12), VX_TYPE_IMAGE);
ASSERT_VX_OBJECT(output_image_l = vxCreateImage(context, info_l.width, info_l.height, VX_DF_IMAGE_NV12), VX_TYPE_IMAGE);
ASSERT_VX_OBJECT(graph = vxCreateGraph(context), VX_TYPE_GRAPH);
ASSERT_VX_OBJECT(node_decode_s = tivxVideoDecoderNode(graph,
configuration_obj_s,
bitstream_obj_s,
output_image_s), VX_TYPE_NODE);
ASSERT_VX_OBJECT(node_decode_l = tivxVideoDecoderNode(graph,
configuration_obj_l,
bitstream_obj_l,
output_image_l), VX_TYPE_NODE);
VX_CALL(vxSetNodeTarget(node_decode_s, VX_TARGET_STRING, TIVX_TARGET_VDEC1));
VX_CALL(vxSetNodeTarget(node_decode_l, VX_TARGET_STRING, second_target));
VX_CALL(vxVerifyGraph(graph));
for (i = 0; i < iterations; i++)
{
VX_CALL(vxMapUserDataObject(bitstream_obj_s, 0, info_s.bitstream_sizes[i], &map_id_s, (void*) &bitstream_s, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST, 0));
VX_CALL(vxMapUserDataObject(bitstream_obj_l, 0, info_l.bitstream_sizes[i], &map_id_l, (void*) &bitstream_l, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST, 0));
in_fp = fopen(input_file_s, "r");
if (NULL != in_fp)
{
seek_status = fseek(in_fp, seek_s[i], SEEK_SET);
if (0 == seek_status)
{
num_read = fread(bitstream_s, sizeof(uint8_t), info_s.bitstream_sizes[i], in_fp);
fclose(in_fp);
in_fp = NULL;
if (info_s.bitstream_sizes[i] != num_read)
{
VX_PRINT(VX_ZONE_INFO,"%s: Read less than expected!!!\n", input_file_s);
ASSERT(info_s.bitstream_sizes[i] == num_read);
}
}
else
{
fclose(in_fp);
in_fp = NULL;
VX_PRINT(VX_ZONE_ERROR,"%s: Seek failed!!!\n", input_file_s);
ASSERT(0 == seek_status);
}
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: Input file not found!!!\n", input_file_s);
ASSERT(NULL != in_fp);
}
in_fp = fopen(input_file_l, "r");
if (NULL != in_fp)
{
seek_status = fseek(in_fp, seek_l[i], SEEK_SET);
if (0 == seek_status)
{
num_read = fread(bitstream_l, sizeof(uint8_t), info_l.bitstream_sizes[i], in_fp);
fclose(in_fp);
in_fp = NULL;
if (info_l.bitstream_sizes[i] != num_read)
{
VX_PRINT(VX_ZONE_INFO," %s: Read less than expected!!!\n", input_file_l);
ASSERT(info_l.bitstream_sizes[i] == num_read);
}
}
else
{
fclose(in_fp);
in_fp = NULL;
VX_PRINT(VX_ZONE_ERROR,"%s: Seek failed!!!\n", input_file_l);
ASSERT(0 == seek_status);
}
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: Input file not found!!!\n", input_file_l);
ASSERT(NULL != in_fp);
}
VX_CALL(vxUnmapUserDataObject(bitstream_obj_s, map_id_s));
VX_CALL(vxUnmapUserDataObject(bitstream_obj_l, map_id_l));
VX_CALL(vxCopyUserDataObject(bitstream_obj_s, 0, sizeof(uint8_t) * info_s.bitstream_sizes[i], bitstream_s, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
VX_CALL(vxCopyUserDataObject(bitstream_obj_l, 0, sizeof(uint8_t) * info_l.bitstream_sizes[i], bitstream_l, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST));
VX_CALL(tivxSetUserDataObjectAttribute(bitstream_obj_s, TIVX_USER_DATA_OBJECT_VALID_SIZE, (void*)&(info_s.bitstream_sizes[i]), sizeof(vx_size)));
VX_CALL(tivxSetUserDataObjectAttribute(bitstream_obj_l, TIVX_USER_DATA_OBJECT_VALID_SIZE, (void*)&(info_l.bitstream_sizes[i]), sizeof(vx_size)));
timestamp = tivxPlatformGetTimeInUsecs();
VX_CALL(vxProcessGraph(graph));
exe_time[i] = (uint32_t)(tivxPlatformGetTimeInUsecs() - timestamp);
#ifndef DUMP_DECODED_VIDEO_TO_FILE
checksum_actual_s = tivx_utils_simple_image_checksum(output_image_s, 0, rect_y_s);
checksum_actual_l = tivx_utils_simple_image_checksum(output_image_l, 0, rect_y_l);
ASSERT(checksum_expected_s[i] == checksum_actual_s);
ASSERT(checksum_expected_l[i] == checksum_actual_l);
rect_uv_s = rect_uv_s; /* dummy instruction to avoid compiler error. will be fixed with updated checksum API which can check for UV plane as well */
rect_uv_l = rect_uv_l; /* dummy instruction to avoid compiler error. will be fixed with updated checksum API which can check for UV plane as well */
#else
VX_CALL(vxMapImagePatch(output_image_s,
&rect_y_s,
0,
&map_id_image_y_s,
&image_addr_y_s,
(void**) &data_ptr_y_s,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
VX_CALL(vxMapImagePatch(output_image_s,
&rect_uv_s,
1,
&map_id_image_uv_s,
&image_addr_uv_s,
(void**) &data_ptr_uv_s,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
if (i < 5)
{
out_fp_s = fopen(output_file_s, "ab");
if (NULL != out_fp_s)
{
for(j = 0; j < info_s.height; j++)
{
num_read = fwrite(data_ptr_y_s + (j * image_addr_y_s.stride_y), sizeof(uint8_t), info_s.width, out_fp_s);
}
for(j = 0; j < (info_s.height / 2); j++)
{
num_read += fwrite(data_ptr_uv_s + (j * image_addr_uv_s.stride_y), sizeof(uint8_t), info_s.width, out_fp_s);
}
fclose(out_fp_s);
out_fp_s = NULL;
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: output file not found!!!\n", output_file_s);
ASSERT(NULL != out_fp_s);
}
}
VX_CALL(vxUnmapImagePatch(output_image_s, map_id_image_y_s));
VX_CALL(vxUnmapImagePatch(output_image_s, map_id_image_uv_s));
VX_CALL(vxMapImagePatch(output_image_l,
&rect_y_l,
0,
&map_id_image_y_l,
&image_addr_y_l,
(void**) &data_ptr_y_l,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
VX_CALL(vxMapImagePatch(output_image_l,
&rect_uv_l,
1,
&map_id_image_uv_l,
&image_addr_uv_l,
(void**) &data_ptr_uv_l,
VX_READ_ONLY,
VX_MEMORY_TYPE_HOST,
VX_NOGAP_X
));
if (i < 5)
{
out_fp_l = fopen(output_file_l, "ab");
if (NULL != out_fp_l)
{
for(j = 0; j < info_l.height; j++)
{
num_read = fwrite(data_ptr_y_l + (j * image_addr_y_l.stride_y), sizeof(uint8_t), info_l.width, out_fp_l);
}
for(j = 0; j < (info_l.height / 2); j++)
{
num_read += fwrite(data_ptr_uv_l + (j * image_addr_uv_l.stride_y), sizeof(uint8_t), info_l.width, out_fp_l);
}
fclose(out_fp_l);
out_fp_l = NULL;
}
else
{
VX_PRINT(VX_ZONE_ERROR,"%s: output file not found!!!\n", output_file_l);
ASSERT(NULL != out_fp_l);
}
}
VX_CALL(vxUnmapImagePatch(output_image_l, map_id_image_y_l));
VX_CALL(vxUnmapImagePatch(output_image_l, map_id_image_uv_l));
#endif
}
#if 0
for (i = 0; i < iterations; i++)
{
printf("exe_time[%d]=%u\n", i, exe_time[i]);
}
#endif
ASSERT(exe_time[iterations-1] < (expected_time_median + 3000));
ASSERT(exe_time[iterations-1] > (expected_time_median - 3000));
VX_CALL(vxReleaseNode(&node_decode_l));
VX_CALL(vxReleaseNode(&node_decode_s));
VX_CALL(vxReleaseGraph(&graph));
VX_CALL(vxReleaseImage(&output_image_l));
VX_CALL(vxReleaseImage(&output_image_s));
VX_CALL(vxReleaseUserDataObject(&bitstream_obj_l));
VX_CALL(vxReleaseUserDataObject(&bitstream_obj_s));
VX_CALL(vxReleaseUserDataObject(&configuration_obj_l));
VX_CALL(vxReleaseUserDataObject(&configuration_obj_s));
ASSERT(node_decode_l == 0);
ASSERT(node_decode_s == 0);
ASSERT(graph == 0);
ASSERT(output_image_l == 0);
ASSERT(output_image_s == 0);
ASSERT(bitstream_obj_l == 0);
ASSERT(bitstream_obj_s == 0);
ASSERT(configuration_obj_l == 0);
ASSERT(configuration_obj_s == 0);
tivxHwaUnLoadKernels(context);
}
}
TESTCASE_TESTS(tivxHwaVideoDecoder, testNodeCreation, testSingleStreamProcessing, testMultiStreamProcessing)
Log:
j7-evm login: root Last login: Mon Jan 25 03:41:28 UTC 2021 root@j7-evm:~# cd /opt/vision_apps/ root@j7-evm:/opt/vision_apps# source ./vision_apps_init.sh root@j7-evm:/opt/vision_apps# [MCU2_0] 723.939009 s: CIO: Init ... Done !!! [MCU2_0] 723.939084 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 1000000000 Hz> [MCU2_0] 723.939124 s: APP: Init ... !!! [MCU2_0] 723.939145 s: SCICLIENT: Init ... !!! [MCU2_0] 723.940261 s: SCICLIENT: DMSC FW version [20.8.5--v2020.08b (Terrific Lla] [MCU2_0] 723.940304 s: SCICLIENT: DMSC FW revision 0x14 [MCU2_0] 723.940330 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_0] 723.940353 s: SCICLIENT: Init ... Done !!! [MCU2_0] 723.940375 s: UDMA: Init ... !!! [MCU2_0] 723.950071 s: UDMA: Init ... Done !!! [MCU2_0] 723.950135 s: MEM: Init ... !!! [MCU2_0] 723.950169 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d2400000 of size 8388608 bytes !!! [MCU2_0] 723.950222 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 131072 bytes !!! [MCU2_0] 723.950268 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ ce000000 of size 65536 bytes !!! [MCU2_0] 723.950311 s: MEM: Init ... Done !!! [MCU2_0] 723.950332 s: IPC: Init ... !!! [MCU2_0] 723.950359 s: IPC: 6 CPUs participating in IPC !!! [MCU2_0] 723.950392 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_0] 738.727093 s: IPC: HLOS is ready !!! [MCU2_0] 738.738609 s: IPC: Init ... Done !!! [MCU2_0] 738.738670 s: APP: Syncing with 5 CPUs ... !!! [MCU2_0] 739.348986 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_0] 739.349173 s: REMOTE_SERVICE: Init ... !!! [MCU2_0] 739.350815 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_0] 739.350875 s: FVID2: Init ... !!! [MCU2_0] 739.350974 s: FVID2: Init ... Done !!! [MCU2_0] 739.351030 s: DSS: Init ... !!! [MCU2_0] 739.351059 s: DSS: Display type is HDMI !!! [MCU2_0] 739.351083 s: DSS: SoC init ... !!! [MCU2_0] 739.351101 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 [MCU2_0] 739.353139 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.353175 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=4 parent=6 [MCU2_0] 739.355664 s: SCICLIENT: Sciclient_pmSetModuleClkParent success [MCU2_0] 739.355698 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=4 freq=148500000 [MCU2_0] 739.389636 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success [MCU2_0] 739.389670 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=4 state=2 flag=0 [MCU2_0] 739.392336 s: SCICLIENT: Sciclient_pmModuleClkRequest success [MCU2_0] 739.392367 s: DSS: SoC init ... Done !!! [MCU2_0] 739.392388 s: DSS: Board init ... !!! [MCU2_0] 739.438329 s: DSS: Board init ... Done !!! [MCU2_0] 739.439795 s: DSS: Init ... Done !!! [MCU2_0] 739.439851 s: VHWA: VPAC Init ... !!! [MCU2_0] 739.439876 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 [MCU2_0] 739.441389 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.441426 s: VHWA: LDC Init ... !!! [MCU2_0] 739.455418 s: VHWA: LDC Init ... Done !!! [MCU2_0] 739.455475 s: VHWA: MSC Init ... !!! [MCU2_0] 739.499277 s: VHWA: MSC Init ... Done !!! [MCU2_0] 739.499353 s: VHWA: NF Init ... !!! [MCU2_0] 739.507837 s: VHWA: NF Init ... Done !!! [MCU2_0] 739.507889 s: VHWA: VISS Init ... !!! [MCU2_0] 739.544549 s: VHWA: VISS Init ... Done !!! [MCU2_0] 739.544599 s: VHWA: VPAC Init ... Done !!! [MCU2_0] 739.544638 s: VX_ZONE_INIT:Enabled [MCU2_0] 739.544662 s: VX_ZONE_ERROR:Enabled [MCU2_0] 739.544681 s: VX_ZONE_WARNING:Enabled [MCU2_0] 739.545713 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target IPU1-0 [MCU2_0] 739.545958 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_NF [MCU2_0] 739.546191 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_LDC1 [MCU2_0] 739.546468 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC1 [MCU2_0] 739.546712 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC2 [MCU2_0] 739.546967 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_VISS1 [MCU2_0] 739.547201 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE1 [MCU2_0] 739.547486 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE2 [MCU2_0] 739.547745 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY1 [MCU2_0] 739.548005 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY2 [MCU2_0] 739.548243 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CSITX [MCU2_0] 739.548540 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE3 [MCU2_0] 739.548814 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE4 [MCU2_0] 739.549102 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE5 [MCU2_0] 739.549433 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE6 [MCU2_0] 739.549728 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE7 [MCU2_0] 739.550007 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE8 [MCU2_0] 739.550062 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [MCU2_0] 739.550092 s: APP: OpenVX Target kernel init ... !!! [MCU2_0] 739.562559 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_0] 739.562613 s: CSI2RX: Init ... !!! [MCU2_0] 739.562638 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 739.563130 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.563161 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 [MCU2_0] 739.564138 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.564177 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 [MCU2_0] 739.565180 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.565210 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 [MCU2_0] 739.565685 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.565715 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 [MCU2_0] 739.566241 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.569379 s: CSI2RX: Init ... Done !!! [MCU2_0] 739.569427 s: CSI2TX: Init ... !!! [MCU2_0] 739.569449 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 [MCU2_0] 739.570585 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.570629 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2 [MCU2_0] 739.571973 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.572006 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 [MCU2_0] 739.573525 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_0] 739.576365 s: CSI2TX: Init ... Done !!! [MCU2_0] 739.576410 s: ISS: Init ... !!! [MCU2_0] 739.576471 s: Found sensor IMX390-UB953_D3 at location 0 [MCU2_0] 739.576525 s: Found sensor AR0233-UB953_MARS at location 1 [MCU2_0] 739.576572 s: Found sensor AR0820-UB953_LI at location 2 [MCU2_0] 739.576618 s: Found sensor UB9xxx_RAW12_TESTPATTERN at location 3 [MCU2_0] 739.576667 s: Found sensor UB96x_UYVY_TESTPATTERN at location 4 [MCU2_0] 739.576712 s: Found sensor GW_AR0233_UYVY at location 5 [MCU2_0] 739.576740 s: IssSensor_Init ... Done !!! [MCU2_0] 739.576821 s: vissRemoteServer_Init ... Done !!! [MCU2_0] 739.576875 s: IttRemoteServer_Init ... Done !!! [MCU2_0] 739.576904 s: UDMA Copy: Init ... !!! [MCU2_0] 739.583728 s: UDMA Copy: Init ... Done !!! [MCU2_0] 739.583781 s: APP: Init ... Done !!! [MCU2_0] 739.583807 s: APP: Run ... !!! [MCU2_0] 739.583827 s: IPC: Starting echo test ... [MCU2_0] 739.586034 s: APP: Run ... Done !!! [MCU2_0] 739.587441 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 739.587533 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 739.587606 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 739.587676 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_1] 724.006223 s: CIO: Init ... Done !!! [MCU2_1] 724.006300 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 1000000000 Hz> [MCU2_1] 724.006346 s: APP: Init ... !!! [MCU2_1] 724.006370 s: SCICLIENT: Init ... !!! [MCU2_1] 724.007506 s: SCICLIENT: DMSC FW version [20.8.5--v2020.08b (Terrific Lla] [MCU2_1] 724.007552 s: SCICLIENT: DMSC FW revision 0x14 [MCU2_1] 724.007584 s: SCICLIENT: DMSC FW ABI revision 3.1 [MCU2_1] 724.007612 s: SCICLIENT: Init ... Done !!! [MCU2_1] 724.007636 s: UDMA: Init ... !!! [MCU2_1] 724.019022 s: UDMA: Init ... Done !!! [MCU2_1] 724.019078 s: MEM: Init ... !!! [MCU2_1] 724.019117 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d2c00000 of size 16777216 bytes !!! [MCU2_1] 724.019174 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3620000 of size 131072 bytes !!! [MCU2_1] 724.019228 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ ce010000 of size 67043328 bytes !!! [MCU2_1] 724.019278 s: MEM: Init ... Done !!! [MCU2_1] 724.019324 s: IPC: Init ... !!! [MCU2_1] 724.019364 s: IPC: 6 CPUs participating in IPC !!! [MCU2_1] 724.019405 s: IPC: Waiting for HLOS to be ready ... !!! [MCU2_1] 739.337126 s: IPC: HLOS is ready !!! [MCU2_1] 739.348874 s: IPC: Init ... Done !!! [MCU2_1] 739.348941 s: APP: Syncing with 5 CPUs ... !!! [MCU2_1] 739.348983 s: APP: Syncing with 5 CPUs ... Done !!! [MCU2_1] 739.349019 s: REMOTE_SERVICE: Init ... !!! [MCU2_1] 739.350840 s: REMOTE_SERVICE: Init ... Done !!! [MCU2_1] 739.350915 s: FVID2: Init ... !!! [MCU2_1] 739.351012 s: FVID2: Init ... Done !!! [MCU2_1] 739.351054 s: VHWA: DMPAC: Init ... !!! [MCU2_1] 739.351082 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 [MCU2_1] 739.351977 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 739.352014 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 [MCU2_1] 739.355287 s: SCICLIENT: Sciclient_pmSetModuleState success [MCU2_1] 739.355329 s: VHWA: DOF Init ... !!! [MCU2_1] 739.428926 s: VHWA: DOF Init ... Done !!! [MCU2_1] 739.428985 s: VHWA: SDE Init ... !!! [MCU2_1] 739.439594 s: VHWA: SDE Init ... Done !!! [MCU2_1] 739.439655 s: VHWA: DMPAC: Init ... Done !!! [MCU2_1] 739.439689 s: VHWA: Codec: Init ... !!! [MCU2_1] 739.439714 s: VHWA: VDEC Init ... !!! [MCU2_1] 739.454508 s: VHWA: VDEC Init ... Done !!! [MCU2_1] 739.454572 s: VHWA: VENC Init ... !!! [MCU2_1] 739.456247 s: MM_ENC_Init: No OCM RAM pool available, fallback to DDR mode for above mp params [MCU2_1] 739.502213 s: VHWA: VENC Init ... Done !!! [MCU2_1] 739.502279 s: VHWA: Init ... Done !!! [MCU2_1] 739.502355 s: VX_ZONE_INIT:Enabled [MCU2_1] 739.502393 s: VX_ZONE_ERROR:Enabled [MCU2_1] 739.502418 s: VX_ZONE_WARNING:Enabled [MCU2_1] 739.503561 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_SDE [MCU2_1] 739.503825 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_DOF [MCU2_1] 739.504068 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VDEC1 [MCU2_1] 739.504359 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VDEC2 [MCU2_1] 739.504636 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VENC1 [MCU2_1] 739.504899 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VENC2 [MCU2_1] 739.504960 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [MCU2_1] 739.504993 s: APP: OpenVX Target kernel init ... !!! [MCU2_1] 739.505363 s: APP: OpenVX Target kernel init ... Done !!! [MCU2_1] 739.505411 s: UDMA Copy: Init ... !!! [MCU2_1] 739.518975 s: UDMA Copy: Init ... Done !!! [MCU2_1] 739.519031 s: APP: Init ... Done !!! [MCU2_1] 739.519060 s: APP: Run ... !!! [MCU2_1] 739.519083 s: IPC: Starting echo test ... [MCU2_1] 739.521338 s: APP: Run ... Done !!! [MCU2_1] 739.522640 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_1] 739.522759 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_1] 739.522852 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_1] 739.587454 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [C6x_1 ] 724.095947 s: CIO: Init ... Done !!! [C6x_1 ] 724.095982 s: ### CPU Frequency <ORG = 1350000000 Hz>, <NEW = 1350000000 Hz> [C6x_1 ] 724.095997 s: APP: Init ... !!! [C6x_1 ] 724.096005 s: SCICLIENT: Init ... !!! [C6x_1 ] 724.097117 s: SCICLIENT: DMSC FW version [20.8.5--v2020.08b (Terrific Lla] [C6x_1 ] 724.097129 s: SCICLIENT: DMSC FW revision 0x14 [C6x_1 ] 724.097139 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_1 ] 724.097149 s: SCICLIENT: Init ... Done !!! [C6x_1 ] 724.097159 s: UDMA: Init ... !!! [C6x_1 ] 724.111080 s: UDMA: Init ... Done !!! [C6x_1 ] 724.111104 s: MEM: Init ... !!! [C6x_1 ] 724.111117 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d4000000 of size 16777216 bytes !!! [C6x_1 ] 724.111135 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! [C6x_1 ] 724.111152 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ d5000000 of size 50331648 bytes !!! [C6x_1 ] 724.111168 s: MEM: Init ... Done !!! [C6x_1 ] 724.111177 s: IPC: Init ... !!! [C6x_1 ] 724.111191 s: IPC: 6 CPUs participating in IPC !!! [C6x_1 ] 724.111206 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_1 ] 736.670877 s: IPC: HLOS is ready !!! [C6x_1 ] 736.694234 s: IPC: Init ... Done !!! [C6x_1 ] 736.694272 s: APP: Syncing with 5 CPUs ... !!! [C6x_1 ] 739.348983 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_1 ] 739.349003 s: REMOTE_SERVICE: Init ... !!! [C6x_1 ] 739.349756 s: REMOTE_SERVICE: Init ... Done !!! [C6x_1 ] 739.349814 s: VX_ZONE_INIT:Enabled [C6x_1 ] 739.349828 s: VX_ZONE_ERROR:Enabled [C6x_1 ] 739.349842 s: VX_ZONE_WARNING:Enabled [C6x_1 ] 739.350941 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C6x_1 ] 739.350961 s: APP: OpenVX Target kernel init ... !!! [C6x_1 ] 739.351303 s: APP: OpenVX Target kernel init ... Done !!! [C6x_1 ] 739.351330 s: UDMA Copy: Init ... !!! [C6x_1 ] 739.402690 s: UDMA Copy: Init ... Done !!! [C6x_1 ] 739.402711 s: APP: Init ... Done !!! [C6x_1 ] 739.408506 s: APP: Run ... !!! [C6x_1 ] 739.408519 s: IPC: Starting echo test ... [C6x_1 ] 739.409735 s: APP: Run ... Done !!! [C6x_1 ] 739.410074 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P] [C6x_1 ] 739.411208 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 739.522326 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 739.587119 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_2 ] 724.155328 s: CIO: Init ... Done !!! [C6x_2 ] 724.155365 s: ### CPU Frequency <ORG = 1350000000 Hz>, <NEW = 1350000000 Hz> [C6x_2 ] 724.155381 s: APP: Init ... !!! [C6x_2 ] 724.155389 s: SCICLIENT: Init ... !!! [C6x_2 ] 724.156540 s: SCICLIENT: DMSC FW version [20.8.5--v2020.08b (Terrific Lla] [C6x_2 ] 724.156554 s: SCICLIENT: DMSC FW revision 0x14 [C6x_2 ] 724.156565 s: SCICLIENT: DMSC FW ABI revision 3.1 [C6x_2 ] 724.156576 s: SCICLIENT: Init ... Done !!! [C6x_2 ] 724.156586 s: UDMA: Init ... !!! [C6x_2 ] 724.171059 s: UDMA: Init ... Done !!! [C6x_2 ] 724.171082 s: MEM: Init ... !!! [C6x_2 ] 724.171096 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ d8000000 of size 16777216 bytes !!! [C6x_2 ] 724.171115 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! [C6x_2 ] 724.171132 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ d9000000 of size 50331648 bytes !!! [C6x_2 ] 724.171150 s: MEM: Init ... Done !!! [C6x_2 ] 724.171159 s: IPC: Init ... !!! [C6x_2 ] 724.171174 s: IPC: 6 CPUs participating in IPC !!! [C6x_2 ] 724.171188 s: IPC: Waiting for HLOS to be ready ... !!! [C6x_2 ] 737.369385 s: IPC: HLOS is ready !!! [C6x_2 ] 737.392583 s: IPC: Init ... Done !!! [C6x_2 ] 737.392622 s: APP: Syncing with 5 CPUs ... !!! [C6x_2 ] 739.348984 s: APP: Syncing with 5 CPUs ... Done !!! [C6x_2 ] 739.349003 s: REMOTE_SERVICE: Init ... !!! [C6x_2 ] 739.349765 s: REMOTE_SERVICE: Init ... Done !!! [C6x_2 ] 739.349820 s: VX_ZONE_INIT:Enabled [C6x_2 ] 739.349834 s: VX_ZONE_ERROR:Enabled [C6x_2 ] 739.349845 s: VX_ZONE_WARNING:Enabled [C6x_2 ] 739.350932 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C6x_2 ] 739.350954 s: APP: OpenVX Target kernel init ... !!! [C6x_2 ] 739.351311 s: APP: OpenVX Target kernel init ... Done !!! [C6x_2 ] 739.351337 s: UDMA Copy: Init ... !!! [C6x_2 ] 739.403746 s: UDMA Copy: Init ... Done !!! [C6x_2 ] 739.403767 s: APP: Init ... Done !!! [C6x_2 ] 739.409393 s: APP: Run ... !!! [C6x_2 ] 739.409407 s: IPC: Starting echo test ... [C6x_2 ] 739.410812 s: APP: Run ... Done !!! [C6x_2 ] 739.411212 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.] [C6x_2 ] 739.411249 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 739.522386 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 739.587135 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C7x_1 ] 724.269914 s: CIO: Init ... Done !!! [C7x_1 ] 724.269938 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 1000000000 Hz> [C7x_1 ] 724.269954 s: APP: Init ... !!! [C7x_1 ] 724.269962 s: SCICLIENT: Init ... !!! [C7x_1 ] 724.271121 s: SCICLIENT: DMSC FW version [20.8.5--v2020.08b (Terrific Lla] [C7x_1 ] 724.271135 s: SCICLIENT: DMSC FW revision 0x14 [C7x_1 ] 724.271145 s: SCICLIENT: DMSC FW ABI revision 3.1 [C7x_1 ] 724.271156 s: SCICLIENT: Init ... Done !!! [C7x_1 ] 724.271165 s: UDMA: Init ... !!! [C7x_1 ] 724.280360 s: UDMA: Init ... Done !!! [C7x_1 ] 724.280372 s: MEM: Init ... !!! [C7x_1 ] 724.280383 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ dc000000 of size 268435456 bytes !!! [C7x_1 ] 724.280404 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!! [C7x_1 ] 724.280422 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 491520 bytes !!! [C7x_1 ] 724.280439 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!! [C7x_1 ] 724.280456 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ ec000000 of size 234881024 bytes !!! [C7x_1 ] 724.280474 s: MEM: Init ... Done !!! [C7x_1 ] 724.280482 s: IPC: Init ... !!! [C7x_1 ] 724.280492 s: IPC: 6 CPUs participating in IPC !!! [C7x_1 ] 724.280506 s: IPC: Waiting for HLOS to be ready ... !!! [C7x_1 ] 737.887551 s: IPC: HLOS is ready !!! [C7x_1 ] 737.897094 s: IPC: Init ... Done !!! [C7x_1 ] 737.897108 s: APP: Syncing with 5 CPUs ... !!! [C7x_1 ] 739.348985 s: APP: Syncing with 5 CPUs ... Done !!! [C7x_1 ] 739.349002 s: REMOTE_SERVICE: Init ... !!! [C7x_1 ] 739.349264 s: REMOTE_SERVICE: Init ... Done !!! [C7x_1 ] 739.349285 s: VX_ZONE_INIT:Enabled [C7x_1 ] 739.349296 s: VX_ZONE_ERROR:Enabled [C7x_1 ] 739.349306 s: VX_ZONE_WARNING:Enabled [C7x_1 ] 739.349624 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! [C7x_1 ] 739.349639 s: APP: OpenVX Target kernel init ... !!! [C7x_1 ] 739.349720 s: APP: OpenVX Target kernel init ... Done !!! [C7x_1 ] 739.349734 s: APP: Init ... Done !!! [C7x_1 ] 739.349743 s: APP: Run ... !!! [C7x_1 ] 739.349751 s: IPC: Starting echo test ... [C7x_1 ] 739.350271 s: APP: Run ... Done !!! [C7x_1 ] 739.410084 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s] [C7x_1 ] 739.411202 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 739.522405 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 739.587155 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] root@j7-evm:/opt/vision_apps# ./vx_app_conformance.out --filter=tivxHwaVideoDecoder.SingleStreamProcessing APP: Init ... !!! MEM: Init ... !!! MEM: Initialized DMA HEAP (fd=4) !!! MEM: Init ... Done !!! IPC: Init ... !!! IPC: Init ... Done !!! REMOTE_SERVICE: Init ... !!! REMOTE_SERVICE: Init ... Done !!! APP: Init ... Done !!! 773.692480 s: VX_ZONE_INIT:Enabled 773.692492 s: VX_ZONE_ERROR:Enabled 773.692506 s: VX_ZONE_WARNING:Enabled 773.696133 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! 773.696287 s: VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!! VxTests version: 1.1-20170301 VCS version: unknown Build config: Release [ ======== ] Total 22683 tests from 151 test cases Use test filter: tivxHwaVideoDecoder.SingleStreamProcessing Use global OpenVX context: FALSE [ -------- ] tests from tivxHwaVideoDecoder [ RUN 0001 ] tivxHwaVideoDecoder.SingleStreamProcessing ... [MCU2_1] 773.901496 s: unclassified data detected! [MCU2_1] 774.088037 s: TID=NULL [GENERAL FIRMWARE PANIC Reason(s): Watch Dog Timeo] [MCU2_1] 774.088112 s: Assertion @ Line: 930 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/hw_control.c: !(0) : failed !!! [MCU2_1] 774.088195 s: Assertion @ Line: 930 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/hw_control.c: !(0) : failed !!! [MCU2_1] 774.088278 s: Assertion @ Line: 4349 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/decoder.c: !(ret == (0)) : failed !!! [MCU2_1] 774.088392 s: Assertion @ Line: 4349 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/decoder.c: !(ret == (0)) : failed !!! [MCU2_1] 774.088483 s: Assertion @ Line: 367 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/core.c: !(ret == (0)) : failed !!! [MCU2_1] 774.088561 s: Assertion @ Line: 367 in /home/mohamed/ti-processor-sdk-rtos-j721e-evm-07_02_00_06/video_codec/ti-img-encode-decode/tirtos/decoder/../../driver/decoder/core.c: !(ret == (0)) : failed !!! [MCU2_1] 774.088632 s: decoder_service_firmware_response failed [MCU2_1] 774.088704 s: [TID=0x00110001] [DECODE_FAILED]
Hi Mohamed,
This does not seems to be related to decoder connection to display.
It seems stream has some issue, so decoder is not able to decode this stream.
I will ask my colleague to help here.
Regards,
Brijesh
Hi Brijesh,
For the demo video: 1280x720_allIframe_CBR_20mbps_HIGHSPEED_HP_CABAC.264
I noticed that the bitstream sizes generated by the ffprobe command and the bitstream sizes array that already exists in the dec_single_channel.cfg file are different.
Do you think that the bitstream sizes is the problem?
Regards,
Mohamed
Hi Mohamed,
It does not look like, the errors are coming from decoder. I am not sure what is "unclassified data" error in decoder. So checking with our expert.
Regards,
Brijesh
Hi Brijesh,
I was trying to find what unclassified data means but I didn't succeed.
I was missing one detail, which is the following:
As you can see in the test_video_decoder.c file, this loop has 100 iterations (which is the number of frames of the default video and the size of the bitstream_sizes array).
In the case of using another transcoded file that has a number of frames greater than 100, it won't work.
Please note that even if the application is working fine, I still have this the unclassified data detected warning as you can see in the log:
root@j7-evm:/opt/vision_apps# ./vx_app_conformance.out --filter=tivxHwaVideoDecoder.SingleStreamProcessing
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
APP: Init ... Done !!!
1635.165245 s: VX_ZONE_INIT:Enabled
1635.165282 s: VX_ZONE_ERROR:Enabled
1635.165286 s: VX_ZONE_WARNING:Enabled
1635.168938 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
1635.169098 s: VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!!
VxTests version: 1.1-20170301
VCS version: unknown
Build config: Release
[ ======== ] Total 22683 tests from 151 test cases
Use test filter: tivxHwaVideoDecoder.SingleStreamProcessing
Use global OpenVX context: FALSE
[ -------- ] tests from tivxHwaVideoDecoder
[ RUN 0001 ] tivxHwaVideoDecoder.SingleStreamProcessing ...
[MCU2_1] 1635.388403 s: unclassified data detected!
[ 316.446240] EXT4-fs (mmcblk1p2): error count since last fsck: 2
[ 316.452150] EXT4-fs (mmcblk1p2): initial error at time 1617095390: ext4_journal_check_start:61
[ 316.460752] EXT4-fs (mmcblk1p2): last error at time 1617095390: ext4_journal_check_start:61
[ DONE ] tivxHwaVideoDecoder.SingleStreamProcessing
[ -------- ] 1 tests from test case tivxHwaVideoDecoder
[ ======== ]
[ ALL DONE ] 1 test(s) from 1 test case(s) ran
[ PASSED ] 1 test(s)
[ FAILED ] 0 test(s)
[ DISABLED ] 0 test(s)
=================================
OpenVX Conformance report summary
=================================
To be conformant to the OpenVX baseline, 1 required test(s) must pass. 1 tests passed, 0 tests failed. PASSED.
To be conformant to the User Data Object extension, 0 required test(s) must pass. 0 tests passed, 0 tests failed. PASSED.
Note: The 0 disabled tests are optional and are not considered for conformance.
#REPORT: YYYYMMDDHHMMSS FILTERED 22683 0 1 1 1 0 (version 1.1-20170301)
1759.100617 s: VX_ZONE_INIT:[tivxHostDeInit:56] De-Initialization Done for HOST !!!
1759.104953 s: VX_ZONE_INIT:[tivxDeInit:111] De-Initialization Done !!!
APP: Deinit ... !!!
REMOTE_SERVICE: Deinit ... !!!
REMOTE_SERVICE: Deinit ... Done !!!
IPC: Deinit ... !!!
IPC: DeInit ... Done !!!
MEM: Deinit ... !!!
MEM: Alloc's: 9 alloc's of 6245916 bytes
MEM: Free's : 9 free's of 6245916 bytes
MEM: Open's : 0 allocs of 0 bytes
MEM: Deinit ... Done !!!
APP: Deinit ... Done !!!
Best Regards,
Mohamed
Hi Mohamed,
We need to provide bir stream size of each file to the decoder. Without that, the code does not know how much to read from the file for decoding a single frame. So this input is required, based on the number of images are available in the bit stream. 100 is used in this example, because the sample stream used to test this file has 100 images.. If you have different number of images, please change it accordingly.
Regards,
Brijesh