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PROCESSOR-SDK-J721E: Does TDA4VM not support 16 bit memory?

Part Number: PROCESSOR-SDK-J721E

Hi TI

Customer considered SK Hynix LPDDR4 H54G46BYYV 16Gb device to replace Micron MT53' 32Gb device which has been applied to TI Jacinto EVM. 

I attached datasheets for both devices.

I could not distinguish btw Micron and SK Hynix regarding bit width. I am not sure why Micron device is 32 bit and SK Hynix device is 16 bit even both use the same 16 DQ I/O width. 

I am asking I found the following restriction statement from DDR config Tool as below.
 "16-bit memory  and bus width not supported" 

Please let me know why Micron' MT53 is 32bit memory and Hynix' H54G46 is 16 bit. 

Thanks. 

200b_z11m_ddp_qdp_auto_lpddr4_lpddr4x.pdf

1781.Automotive_DA 16Gb LPDDR4_H54G46BYYV(Q,P)X053_Rev1.1.pdf

  • Hi Jack,

    At the time of release of v0.5.0, we did not have support for 16-bit. 16-bit support is added into version 0.6.0 of the Jacinto7 DDRSS Register Configuration Tool. Version 0.6.0 has not yet been released, but should be available within the next four weeks. If you need something sooner, please let me know.

    The SK Hynix memory appears to be 32-bit (2x 16-bit channels). For LPDDR4, typically each channel is 16-bit. Most LPDDR4 memories I have seen have 2x channels, to make the full bus width 32-bit. However, there are some LP4 memories which have a single channel, and full bus width is 16-bit. Version 0.5.0 of the Jacinto7 DDRSS Register Configuration tool did not support these single channel LP4 memories. 

    Let us know if further questions exist.

    Regards,
    Kevin

  • Thank you for your quick answer. Kevin

    Regards, 

    Jack