OMAPL138B-EP: BOOT ISSUE by NAND flash after warm reset

Gary Wu

Part Number: OMAPL138B-EP
Other Parts Discussed in Thread: OMAP-L138

Hi,

My customer use one of GPIO pin of FPGA to assert reset by connecting the GPIO to WARM RESET pin of the OMAP-L138 SoC.

It works normally when booting from SPI flash. But it fails when booting from NAND flash. It can boot normally from NAND flash when POWER ON RESET.

Could you give suggestions for this issue?

From e2e forum, there are 2 threads about warm reset.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/105346/power-on-and-warm-reset-on-omap-l138

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/621779/how-to-implement-reset-logic-on-the-omap-l138-dsp-core

over 4 years ago

0 JJD over 4 years ago

TI__Guru* 87240 points

First check that the Warm Reset pulse satisfies the input requirements of the signal. Is it a clean pulse of at least 100ns?

Does the device appear to be booting after the warm reset? Can you see NAND CS toggle during boot? Do you have any more details on the failure?

REgards,

James

0 Gary Wu over 4 years ago in reply to JJD

TI__Expert 3313 points

James,

Thanks for your reply.

Yes, the pulse of reset is more than 100ns.They can see NAND CS toggle during boot.

0 JJD over 4 years ago in reply to Gary Wu

TI__Guru* 87240 points

Can you connect via JTAG and see where the program counter (PC) is when the boot has failed? Need to determine if the execution is still in the ROM or has entered SPL. What OS do you have in the flash?

Regards,

James

0 Gary Wu over 4 years ago in reply to JJD

TI__Expert 3313 points

Yes, the PC is running at 0xfffd45dc and 0xfffd45e0. It seems it's in dead circulation.

The OS is vxworks.

0 Gary Wu over 4 years ago in reply to JJD

TI__Expert 3313 points

James,

Any further feedback about this issue?

0 Gary Wu over 4 years ago in reply to Gary Wu

TI__Expert 3313 points

Refer to https://e2e.ti.com/support/processors-group/processors/f/processors-forum/337673/omap-l138-boot-rom-rev-d800k008-bugs/1179674#1179674

there are some related comments

"- When the boot fails with the D800K008 ROM, emulator shows the ARM is doing an infinite loop (same loop when CRC error encountered):
FFFD45DC MOV R0,R0
FFFD45E0 B 0xFFFD45DC

0 JJD over 4 years ago in reply to Gary Wu

TI__Guru* 87240 points

Not sure what could be going wrong, esp. since everything works with a power on reset. Is the warm reset connected in any way to the NAND device? Can you monitor the R/Bn signal after the warm reset to see if that is in a READY state when the ROM is attempting to boot from it?

Regards,

James

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OMAPL138B-EP: BOOT ISSUE by NAND flash after warm reset