DRA821U: when Primery Boot Mode is configured as no-boot/Dev boot and Backup Boot Mode is configured as SPI,CCS cannot load the debugging script normally

menghua wei

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

Following are the switch settings for common processor board:
SW8[1-8] = 1011 1000
SW9[1-8] = 0111 0000

This problem only appears in Windows system, but not in Linux system

0 jian35385 over 4 years ago

Fan,

js script can be configured to either load or not load GEL file. If do, can you check fi the GEL file under CCS:

ccs1031\ccs\ccs_base\emulation\gel\J7200_DRA821\J7VCL_SI.gel

where the macro:

#define DMSC_FLOW (0U) // Change to 0 if not using DMSC Firmware
// Change to 1 if using DMSC firmware.

allows GEL to initialize DDR. If the DDR is not initialized and the jsfile attempt to load programs to the DDR, it will fail.

I recently run into a similar debug with Rio:

In my test, I set the DMSC_FLOW to 0, and let GEL to initialize DDR. it did past the line where the ACTM is filled (from DDR).

let me know if this may be the cause. i don't have a CCS install on Linux at the moment.

Jian

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