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TDA4VM: How to set DSI dphy Div for 2560x800 resulution?

Part Number: TDA4VM

Dear TI,

At first, I succeed DSI display for 1280x800 and 4lane with following changes on custom board.

1. vision_apps/apps/basic_demos/app_tirtos/common/app_init.c

/* 1280x800 */
prm.timings.width = 1280U;
prm.timings.height = 800U;
prm.timings.hFrontPorch = 80U;
prm.timings.hBackPorch = 128U;
prm.timings.hSyncLen = 32U;
prm.timings.vFrontPorch = 4U;
prm.timings.vBackPorch = 14U;
prm.timings.vSyncLen = 6U;
prm.timings.pixelClock = 74148000ULL;

2. vision_apps/utils/dss/src/app_dss_defaults.c

    if(obj->initPrm.display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
    {
        /* Only two lanes output supported for AOU LCD */
        dsiParams.num_lanes = 4u;
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_DSI_PARAMS, &dsiParamssizeof(app_dctrl_dsi_params_t), 0U);
    }

3. ti/drv/dss/src/drv/dctrl/dss_dctrlDsi.c

dsiObj->dphyTxIpDiv = 0x2;
dsiObj->dphyTxOpDiv = 0x4;
dsiObj->dphyTxFbDiv = 0x173;
dsiObj->dphyTxRate = 0xE7;
dsiObj->cfgDsiTx.numOfLanes = 0x2u;
dsiObj->privDsiTx.numOfLanes = 0x2u;

4. vision_apps/utils/dss/src/app_dss_j721e.c

- Change number of DSI lanes of Serializer.

Now I'm trying to bring up the 2560x800(1280x2x800). But I don't know how to set dphy value in (ti/drv/dss/src/drv/dctrl/dss_dctrlDsi.c).

This is the display timing for 2560x800.

/* 2560x800 */
prm.timings.width = 2560U;
prm.timings.height = 800U;
prm.timings.hFrontPorch = 160U;
prm.timings.hBackPorch = 256U;
prm.timings.hSyncLen = 64U;
prm.timings.vFrontPorch = 4U;
prm.timings.vBackPorch = 14U;
prm.timings.vSyncLen = 6U;
prm.timings.pixelClock = 150297600ULL;

Could you let me know how to set following parameters for 2560x800 with 4lane?

dsiObj->dphyTxIpDiv = 0x2;
dsiObj->dphyTxOpDiv = 0x4;
dsiObj->dphyTxFbDiv = 0x173; 
dsiObj->dphyTxRate = 0xE7;
dsiObj->cfgDsiTx.numOfLanes = 0x2u;
dsiObj->privDsiTx.numOfLanes = 0x2u;

Best Regards,

Jaewook

  • Hi Jaewook,

    Could you help me understand, what is the output lane speed that you require at your receiver? The parameters are dependent on the output lane speed.

    Regards,

    Brijesh

  • Hi Brijesh,

    The receiver(UH981) requires 450Mhz lane speed.

    Thanks,

    Jaewook.

  • Hi Brijesh,

    Please ignore previous my comment.

    I will let you know the correct data tomorrow.

    Thanks,

    Jaewook

  • Hi Brijesh,

    I need to make below output.

    ## DSI Lanes = 4
    ## DSI Rate = 901.74 Mbps/lane
    ## DSI clk freq = 451Mhz

    Thanks,

    Jaewook

  • Hi Jaewook Kim,

    I did not get the last requirement, what is DSI clk freq? Is that pixel clock? But pixel clock is set to 150MHz, isn't it?

    Can you check with below values?

    dsiObj->dphyTxIpDiv = 0x2;
    dsiObj->dphyTxOpDiv = 0x2;
    dsiObj->dphyTxFbDiv = 0x177; 
    dsiObj->dphyTxRate = (0xE << 0) | (0xE << 5);
    dsiObj->cfgDsiTx.numOfLanes = 0x4u;
    dsiObj->privDsiTx.numOfLanes = 0x4u;

    Regards,

    Brijesh

  • Hi Brijesh,

    I means that DSI clk freq is frequency of DSI_TXCLKP lane.

    When I set parameters like this, both clock lane and data lane keeps a constant voltage without movement.

    1. Changes for 2560x800 on top of 1280x800

     1). vision_apps/apps/basic_demos/app_tirtos/common/app_init.c

    /* 2560x800 */
    prm.timings.width = 2560U;
    prm.timings.height = 800U;
    prm.timings.hFrontPorch = 160U;
    prm.timings.hBackPorch = 256U;
    prm.timings.hSyncLen = 64U;
    prm.timings.vFrontPorch = 4U;
    prm.timings.vBackPorch = 14U;
    prm.timings.vSyncLen = 6U;
    prm.timings.pixelClock = 150297600ULL;

    2. ti/drv/dss/src/drv/dctrl/dss_dctrlDsi.c

    dsiObj->dphyTxIpDiv = 0x2;
    dsiObj->dphyTxOpDiv = 0x2;
    dsiObj->dphyTxFbDiv = 0x177; 
    dsiObj->dphyTxRate = (0xE << 0) | (0xE << 5);
    dsiObj->cfgDsiTx.numOfLanes = 0x4u;
    dsiObj->privDsiTx.numOfLanes = 0x4u;

    2. Result : Not working. There are no movement both DSI clock and data lane. Keeps a constant voltage without movement.

    Clock lane : 200mV

    Data lane :  1.2V

    Does it required additional setting for resolution change?

    I don't know what the problem is.

    Thanks,

    Jaewook.

  • Hi Brijesh,

    And I use the run_app_multi_cam.sh for checking 2560x800 display.

    This is a patch of app_multi_cam for 2560x800 output display.

    I always set the number of input camera to 2.

    Thanks,

    Jaewook

    diff --git a/vision_apps/apps/basic_demos/app_multi_cam/main.c b/vision_apps/apps/basic_demos/app_multi_cam/main.c
    index 5fe6a76..3bb60ab 100755
    --- a/vision_apps/apps/basic_demos/app_multi_cam/main.c
    +++ b/vision_apps/apps/basic_demos/app_multi_cam/main.c
    @@ -142,7 +142,7 @@ static void app_default_param_set(AppObj *obj);
     static void app_update_param_set(AppObj *obj);
     static void app_pipeline_params_defaults(AppObj *obj);
     static void add_graph_parameter_by_node_index(vx_graph graph, vx_node node, vx_uint32 node_parameter_index);
    -static vx_int32 calc_grid_size(vx_uint32 ch);
    +//static vx_int32 calc_grid_size(vx_uint32 ch);
     static void set_img_mosaic_params(ImgMosaicObj *imgMosaicObj, vx_uint32 in_width, vx_uint32 in_height, vx_int32 numCh);
     
     static void app_show_usage(vx_int32 argc, vx_char* argv[])
    @@ -991,7 +991,7 @@ static vx_status app_run_graph_for_one_frame_pipeline(AppObj *obj, vx_int32 fram
     {
         vx_status status = VX_SUCCESS;
     
    -    APP_PRINTF("app_run_graph_for_one_pipeline: frame %d beginning\n", frame_id);
    +//    APP_PRINTF("app_run_graph_for_one_pipeline: frame %d beginning\n", frame_id);
         appPerfPointBegin(&obj->total_perf);
     
         ImgMosaicObj *imgMosaicObj = &obj->imgMosaicObj;
    @@ -1224,7 +1224,7 @@ static void app_default_param_set(AppObj *obj)
         obj->sensorObj.num_cameras_enabled = 1;
         obj->sensorObj.usecase_option = APP_SENSOR_FEATURE_CFG_UC0;
     }
    -
    +/*
     static vx_int32 calc_grid_size(vx_uint32 ch)
     {
         if(0==ch)
    @@ -1251,14 +1251,14 @@ static vx_int32 calc_grid_size(vx_uint32 ch)
             return -1;
         }
     }
    -
    +*/
     static void set_img_mosaic_params(ImgMosaicObj *imgMosaicObj, vx_uint32 in_width, vx_uint32 in_height, vx_int32 numCh)
     {
         vx_int32 idx, ch;
    -    vx_int32 grid_size = calc_grid_size(numCh);
    +//    vx_int32 grid_size = calc_grid_size(numCh);
     
    -    imgMosaicObj->out_width    = DISPLAY_WIDTH;
    -    imgMosaicObj->out_height   = DISPLAY_HEIGHT;
    +    imgMosaicObj->out_width    = 2560;//CMS_DISPLAY_WIDTH;
    +    imgMosaicObj->out_height   = 800;//CMS_DISPLAY_HEIGHT;
         imgMosaicObj->num_inputs   = 1;
     
         idx = 0;
    @@ -1267,13 +1267,13 @@ static void set_img_mosaic_params(ImgMosaicObj *imgMosaicObj, vx_uint32 in_width
     
         for(ch = 0; ch < numCh; ch++)
         {
    -        vx_int32 winX = ch%grid_size;
    -        vx_int32 winY = ch/grid_size;
    +//        vx_int32 winX = ch%grid_size;
    +//        vx_int32 winY = ch/grid_size;
     
    -        imgMosaicObj->params.windows[idx].startX  = (winX * (in_width/grid_size));
    -        imgMosaicObj->params.windows[idx].startY  = (winY * (in_height/grid_size));
    -        imgMosaicObj->params.windows[idx].width   = in_width/grid_size;
    -        imgMosaicObj->params.windows[idx].height  = in_height/grid_size;
    +        imgMosaicObj->params.windows[idx].startX  = (ch*1280);//(winX * (in_width/grid_size));
    +        imgMosaicObj->params.windows[idx].startY  = 0;//(winY * (in_height/grid_size));
    +        imgMosaicObj->params.windows[idx].width   = 1280;//in_width/grid_size;
    +        imgMosaicObj->params.windows[idx].height  = 800;//in_height/grid_size;
             imgMosaicObj->params.windows[idx].input_select   = 0;
             imgMosaicObj->params.windows[idx].channel_select = ch;
             idx++;
    
    
    
    diff --git a/vision_apps/modules/src/app_display_module.c b/vision_apps/modules/src/app_display_module.c
    index e57cc36..7cc53f0 100644
    --- a/vision_apps/modules/src/app_display_module.c
    +++ b/vision_apps/modules/src/app_display_module.c
    @@ -82,10 +82,44 @@ vx_status app_init_display(vx_context context, DisplayObj *displayObj, char *obj
     
                 displayObj->disp_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE;//TIVX_KERNEL_DISPLAY_BUFFER_COPY_MODE;
                 displayObj->disp_params.pipeId = 0; /* pipe ID = 2 */
    -            displayObj->disp_params.outWidth = DISPLAY_WIDTH;
    -            displayObj->disp_params.outHeight = DISPLAY_HEIGHT;
    -            displayObj->disp_params.posX = (1920-DISPLAY_WIDTH)/2;
    -            displayObj->disp_params.posY = (1080-DISPLAY_HEIGHT)/2;
    +            displayObj->disp_params.outWidth = 2560;//DISPLAY_WIDTH;
    +            displayObj->disp_params.outHeight = 800;//DISPLAY_HEIGHT;
    +            displayObj->disp_params.posX = 0;//(1920-DISPLAY_WIDTH)/2;
    +            displayObj->disp_params.posY = 0;//(1080-DISPLAY_HEIGHT)/2;
    
     
                 displayObj->disp_params_obj = vxCreateUserDataObject(context, "tivx_display_params_t", sizeof(tivx_display_params_t), &displayObj->disp_params);
                 status = vxGetStatus((vx_reference)displayObj->disp_params_obj);
    

  • Hi Brijesh,

    Let me summarize current status.

    1. sdk version: ti-processor-sdk-rtos-j721e-evm-07_02_00_06

    2. HW : TDA4 -> UH981 serializer -> 1280x800 LCD(Two LCD are connected for using splitter mode)

    3. My goal : 2560x800  DSI display.

    4. 1st step : 1280x800 display

        - This is OK. I verified this by ./run_app_tidl.sh, ./run_app_single_cam.sh and ./run_app_multi_cam.sh

    5. 2nd step : 2560x800 display

       - Not working

       -  When I check the DSI lane by oscilloscope directly, there are no output clk from TDA4. It is always keeps same voltage(1.2V) without waveform.

      - I changed timing and Div setting as previous comment.

      - I tested this by ./run_app_tidl.sh, ./run_app_single_cam.sh and ./run_app_multi_cam.sh

    Question

    1. Is DSI display supported for 2560x800 resolution?

    2. Does it required additional setting for resolution change?

    I can't find cause for this.

    Best Regards,

    Jaewook

  • Hello Brijesh,

    I solved this issue.

    I changed "FvDiv" value from 0x177 to 0x178 as below.

    dsiObj->dphyTxFbDiv = 0x178;

    After that, the 2560x800 DSI display is working well.

    Thank you!!.

    Jaewook

  • Hello JaeWook Kim,

    ok good to know. I think we need to use ceiling value for FbDiv calculation. Thanks for the update.

    Please close the thread if the question is answered.

    Regards,

    Brijesh

  • Hello Jaewook,

    Thanks to your post, it helped a lot !

    But I got one more question wanna ask you for help: Do you know how to set the value of "dphyTxRate"?

    As you said you want a Lane Rate at  901.74 Mbps/lane, But the value of " (0xE << 0) | (0xE << 5)" is 462. I'm so confusedThinking

    So could please help me understanding how to set this param?

    Regards,

    Damon

  • Hello Damon,

    As far as I understood, dphyTxRate means "total width x total height x BPP".

    For example, This is the formula for 2560x800.

    3040x824x60x3 = 450,892,800 = 451Mhz = 0x1C3.

    And When I checked the DPHY_TX_PCS_TX_DIG_TBIT0  in TDA4 user manual, 

    The values ​​of PCS_BAND_CTL_REG_R and PCS_BAND_CTL_REG_L seem to should be the same.

    Finally, the value of dphyTxRate seems to be  " (0xE << 0) | (0xE << 5)"

    Thanks,

    Jaewook

  • Hi Jaewook,

    Thank you!The formula you shared is so helpful that I caculate the params of 800x600@60Fps and the screen display success!

    There are still 2 questions:

    1、Does the 'BPP' you mentioned means 'bit per pixel' or 'byte per pixel'?

    2、In the example, you pluse a '3' at last. Is it because each pixel contains 3 bytes?

          Or, I have another understanding about this '3': might it comes from this formula?

            3 * 8 / ( 4 * 2 ) = 3;

            '3': 3 bytes per pixel;

            '8': 8 bits per byte;

            '4': 4 data lanes are used;(this might be changed to 1,2 or 3 in some case)

            '2': mipi clock use bilateral sampling

    And there is another phenomenon:

    In case of 1920*720@60, I use (0xA<<0)|(0xA<<5) as TxRate and it succeed.

    Then I tried some other values instead of 0xA, such as: 0x9, 0x8, 0x7, 0x6, 0x5. The screen always displayed successfully untill I set the value to be (0x4<<0)|(0x4<<5).  It makes me feel confused too.

    Regards,

    Damon

  • Hi Damon,

    Please find inline comments.

    1、Does the 'BPP' you mentioned means 'bit per pixel' or 'byte per pixel'?

    => I mean BPP is BytePerPixel. As far as I know, DSS ouput format is RGB24bpp(bit per pixel). So I used 3 Byte Per Pixel.

    Then I tried some other values instead of 0xA, such as: 0x9, 0x8, 0x7, 0x6, 0x5. The screen always displayed successfully untill I set the value to be (0x4<<0)|(0x4<<5).  It makes me feel confused too.

    => I'm also confusing this. Sorry I'm not sure about that.

    Thanks,

    Jaewook

  • Hi JaeWook,

    Thank you very much.You are so kind!

    I will ask Brijesh for help on the last question.

    Regards,

    Damon

  • Hi Damon,

    When you set 0xA, the lane speed would in 560Mbps to 640Mbps. 

    Regards,

    Brijesh

  • Hi Brijesh,

    How is the correspondence between ((0xA<<0)|(0xA<<5)) and (560,640) calculated? I couldn't find any more informatino in the manual.

    Is there some logic to convert these two values?

    And Why does the other values works too?(0x5, 0x6, 0x7,0x8)

    Regards,

    Damon

  • Hi Damon,

    Please refer to lane band speed values in ti-processor-sdk-rtos-j721e-evm-07_03_00_07\pdk_jacinto_07_03_00_29\packages\ti\drv\csitx\soc\V0\csitx_soc.h. This is same for even DSI. 

    Lets continue our discussion on the other thread.

    Regards,

    Brijesh

  • Hi Brihesh,

    Thank you! I'll check this header file and talk to you on the other thread.

    Regards,

    Damon