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Original question:

TDA4 switch multicast frame support problem

TDA4 I2C Fast Mode 1M baud-rate support

ronaldo ding(DJI)
Intellectual 365 points

According to the TDA4 data sheet, the maximum I2C rate is 400k in Fast Mode. However, we can set the I2C rate to be 1M by setting the register I2C_SCLH in  Fast Mode. Is this used way feasible?

  • 0
    TI__Genius 10631 points

    Dear customer:   

         The WKUP_I2C0, MCU_I2C0, I2C0, and I2C1 controllers have dedicated I2C compliant open drain buffers, and support high speed mode (up to 3.4 Mbps in 1.8 V mode and up to 400 kbps in 3.3 V mode). The MCU_I2C1,I2C2, I2C3, I2C4, I2C5, and I2C6 controllers are multiplexed with standard LVCMOS I/O, connected to emulate open drain, and support fast mode (up to 400 kbps in 1.8 V/3.3 V mode).  So the max speed is up to 3.4Mbps on some ports in 1.8 V mode.  Could you please check which I2C port is using? Thanks.

    Linjun

  • 0 in reply to Linjun Meng
    Intellectual 365 points

    We use MCU_I2C1(F29 abd G28) and I2C2(P25 and R29).
    I still have some questions about the reply.
    1) It means only WKUP_I2C0, MCU_I2C0 and I2C1 support 1Mbps? However, Setting registers I2C_SCLL and I2C_SCLH of MCU_I2C1 can make it work at 1M.
    2) The I2C port means I2C peripheral or PINs of I2C. For example, pin P25 and R29 just supports up to 400k?
    3) If a I2C port supports up to 1M, can it works on 1M in fast mode or high mode?

  • 0 in reply to ronaldo ding(DJI)
    TI__Genius 10631 points

    The MCU_I2C1 , and I2C2  are connected to emulate open drain, it can't reach to 3.4Mbps.   The I2C is  main domain  I2C.  so there are 4 I2C ports (WKUP_I2C0, MCU_I2C0, Main domain I2C0, and I2C1) support up to 3.4 Mbps.  Generally , the speed  is depend on the signal quality and other factors such as core workload if without other dedicate IP core support .

  • 0 in reply to Linjun Meng
    Intellectual 365 points

    For the I2C high speed mode, why is there a master code? Dose it affects the communication with a I2C slaver?
    For our test, the TDA4 I2C, which works in 1M HS Mode, can not communicate with a I2C slaver which supports data rate up to 1M

  • 0 in reply to ronaldo ding(DJI)
    TI__Expert 4015 points

    The instance you are using, MCU_I2C1, does not support 1M.  It only supports a data rate up to 0.4Mb/s. 

  • 0 in reply to ronaldo ding(DJI)
    TI__Genius 10631 points

    HI Ronaldo,

        Because the i2c controller have multi- master, such as wakeup domain , MCU domain, and main domain, the master code is for the selection. As the TRM description.

          In this case, after the S condition, the module, which is in F/S mode, writes the master code address (0x00001XXX, where XXX is the variable portion of the master code) on the bus. No device connected on the same bus acknowledges this address. The module
    switches the clock to the HS clock and after an Sr condition, and sends the slave address and the data.

       we can see there is a Sr ( repeated start) signal after the first master code stop.  I don't think there is any impact to the slave device for  correspondence if the slave can work in HS mode.

    Best regards,

    Linjun