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TMS320DM8168: Regarding issues faced with Customized SOM based on TMS320DM8168.

Kumaraswamy HV
Prodigy 160 points

Reference Documents:

Reference 1:  processors.wiki.ti.com/.../DM816x_C6A816x_AM389x_DDR3_Init

Reference 2:  DM8168’s Technical Reference Manual.

 

Description:

We have interfaced 2 chips to DDR0 section of DM8168 and another 2 chips to DDR1 section of DM8168.

CLK trace and DQS trace for DDR0 interface is as follows:

 

CLK trace and DQS trace for DDR1 interface is as follows:

 

We have used Excel spreadsheet from “RatioSeed.zip” for obtaining the seed values which is the input to the CCS based app.

We have taken 400MHz for DDR3 clock frequency and 1 for Invert Clock Output. We have followed the steps as per the document present in “Reference 1” above for Byte wise levelling of DDR3 and Optimum values of RD_DQS, WR_DQS, and RD_GATE_DQS are obtained. These values are entered in GEL file titled “EVMDM8168_mod_400_withNewseedValue_SOM_REV01.gel”. With this we were able to get connected through XDS200 JTAG to DM8168. We have entered the following values in “ddr_defs_ti816x.h” under “Bootloader/u-boot-2010.06/src/arch/arm/include/asm/arch-ti81xx/” and built the Bootloader:

 #if defined(CONFIG_TI816X_DDR3_400)
#define WR_DQS_RATIO_BYTE_LANE3         ((emif == 0) ? 0x7A : 0x7E )
#define WR_DQS_RATIO_BYTE_LANE2         ((emif == 0) ? 0x79 : 0x7D )
#define WR_DQS_RATIO_BYTE_LANE1         ((emif == 0) ? 0x82 : 0x75 )
#define WR_DQS_RATIO_BYTE_LANE0         ((emif == 0) ? 0x83 : 0x76 )
 
#define WR_DATA_RATIO_BYTE_LANE3        ((emif == 0) ? ( WR_DQS_RATIO_BYTE_LANE3 + 0x40 ):(  WR_DQS_RATIO_BYTE_LANE3 + 0x40  ))
#define WR_DATA_RATIO_BYTE_LANE2        ((emif == 0) ? ( WR_DQS_RATIO_BYTE_LANE2 + 0x40 ):(  WR_DQS_RATIO_BYTE_LANE2 + 0x40  ))
#define WR_DATA_RATIO_BYTE_LANE1        ((emif == 0) ? ( WR_DQS_RATIO_BYTE_LANE1 + 0x40 ):(  WR_DQS_RATIO_BYTE_LANE1 + 0x40  ))
#define WR_DATA_RATIO_BYTE_LANE0        ((emif == 0) ? ( WR_DQS_RATIO_BYTE_LANE0 + 0x40 ):(  WR_DQS_RATIO_BYTE_LANE0 + 0x40  ))
 
#define RD_DQS_RATIO0                    ((emif == 0) ? 0x3B : 0x37)
#define RD_DQS_RATIO1                    ((emif == 0) ? 0x39 : 0x39)
#define RD_DQS_RATIO2                    ((emif == 0) ? 0x3C : 0x3C)
#define RD_DQS_RATIO3                    ((emif == 0) ? 0x3C : 0x3A)

#define DQS_GATE_BYTE_LANE0             ((emif == 0) ? 0x115 : 0xFE)
#define DQS_GATE_BYTE_LANE1             ((emif == 0) ? 0x11D : 0x103)
#define DQS_GATE_BYTE_LANE2             ((emif == 0) ? 0xFB : 0x10F)
#define DQS_GATE_BYTE_LANE3             ((emif == 0) ? 0x103 : 0x116)
       
#endif

SOM card is able to boot with BOOTLOADER and run Kernel.

But it is unable to sync with Filesystem.

So we had stopped the boot prompt on u-Boot terminal and we have done the DDR3 memory test through “mTest” command.

We did not get any error for full memory range test through “mTest” command.

Previous SOM is able to get synced with UBIFS Filesystem.

Current Customized DM8168 based SOM Card is unable to get it synced with UBIFS Filesystem.

Please note that, in this SOM revision there is no change in the signal connections and circuit.

Please let us know if there is any way to check cross talks over U-boot to test DDR3 Memory for full 2GB range.

We are unable to identify the root cause of the issue.

Please suggest what checks can be done to identify the issue.

We will be waiting for your reply.

Please find the attached files for your quick reference.

ddr_defs_ti816x.hEVMDM8168_mod_400_withNewseedValue_SOM_REV01.gelinRatioSeed_13SEP2021_emif0.xlsRatioSeed_13SEP2021_emif1.xlsDM816x C6A816x AM389x DDR3 Init Bytewise Levelling- Texas Instruments Wiki.pdfTI816x_DDR3.gel

FilesystemCrash.txt
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Backtrace:
[<c00c260c>] (kfree+0x0/0xd0) from [<c0095918>] (free_modinfo_version+0x18/0x24)
r7:fffffffe r6:bf002118 r5:00000000 r4:bf002118
[<c0095900>] (free_modinfo_version+0x0/0x24) from [<c00979f8>] (load_module+0x1384/0x1440)
r5:00000000 r4:00000000
[<c0096674>] (load_module+0x0/0x1440) from [<c0097b00>] (sys_init_module+0x4c/0x1bc)
[<c0097ab4>] (sys_init_module+0x0/0x1bc) from [<c0044e00>] (ret_fast_syscall+0x0/0x30)
r7:00000080 r6:00000000 r5:00000000 r4:00006572
Code: e5933000 e5921000 e1a03623 e0633620 (e7912283)
---[ end trace b2240751987301ff ]---
Error while running '/etc/rc.d/S00coprocessors'.
Starting System
Unable to handle kernel NULL pointer dereference at virtual address 0000000d
pgd = c0004000
[0000000d] *pgd=00000000
Internal error: Oops: 17 [#2]
last sysfs file: /sys/devices/virtual/tty/tty/dev
Modules linked in:
CPU: 0 Tainted: G D (2.6.37-ridgerun #506)
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

 

 

Thanking You,

With Best Regards,

KumaraswamyHollaV