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TDA2SX: EVE program cache error detection

Part Number: TDA2SX

Below is our detection method:

EVE Program cache-related parity error configuration:

1. Step: EVE_PMEM_ED_CTL=0x01-----bit 1 INV=1;bit 0 EN=1;

2. Step: cycle to read EVE_PMEM_ED_STAT register--- How to estimate PMEM  error,bit 24~16 SYSCONNID=0x100 ,it means ARP32 ownership error ,and bit0 ARP32ERR =1,

3. Stem :read  EVE_PMEM_EDADDR  check the physical address of parity error  .

For DMEM error detection , we use the same method and configuration .

but : check EVE_DMEM_ED_STAT register,bit0 ARP32ERR =0;  I think it don't occur error. 

Please help me to check  is the method and  configuration correction?

thanks!

  • This is test information:

    1 . read physical address 0x42080080 ;readback:0x00000000;

    2. write physical address 0x42080080 with 1; readback:0x00000001;

    3. read physical address 0x42080084 ;readback:0x01000001;   I think it shows PMEM occur error;

    4. write physical address 0x42080080 with 3;  for check readback:0x00000003;

    5.read physical address 0x42080084 ;readback :0x01000001;   it is abnormal ,because the status register  is no change.

    is it correction ? please help to solve this issue. thanks!

  • This is test information:

    1 . read control physical address 0x42080080 ;readback:0x00000000;

    2. write control  physical address 0x42080080 with 1; readback:0x00000001;

    3. read error status physical address 0x42080084 ;readback:0x01000001;   I think it shows PMEM occur error;

    4. write control physical address 0x42080080 with 3;  for check readback:0x00000003;

    5.read  error status physical address 0x42080084 ;readback :0x01000001;   it is abnormal ,because the status register  is no change.

    is it correction ? please help to solve this issue. thanks!

  • Hello,

    Your summary looks OK.  Did you resolve your issue?

    Regards,
    Kyle