Below is our detection method:
EVE Program cache-related parity error configuration:
1. Step: EVE_PMEM_ED_CTL=0x01-----bit 1 INV=1;bit 0 EN=1;
2. Step: cycle to read EVE_PMEM_ED_STAT register--- How to estimate PMEM error,bit 24~16 SYSCONNID=0x100 ,it means ARP32 ownership error ,and bit0 ARP32ERR =1,
3. Stem :read EVE_PMEM_EDADDR check the physical address of parity error .
For DMEM error detection , we use the same method and configuration .
but : check EVE_DMEM_ED_STAT register,bit0 ARP32ERR =0; I think it don't occur error.
Please help me to check is the method and configuration correction?
thanks!