66AK2G12: Timer interrupt

Gaurav Aggarwal

Part Number: 66AK2G12

I am using pdk_k2g_1_0_16 on windows host pc with K2Gx evaluation board. I have used timer APIs from C:\ti\pdk_k2g_1_0_16\packages\ti\csl\example\timer\timer_app\main_a15.c to use timer as general purpose timer and it should generate interrupt at every 1ms. Some undeclared variables error are coming for varibales, macros as listed below. Could you please tell in in which files I can locate these?

CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_MPU,gXbarInst,CSL_XBAR_TIMER4_IRQ); In this CSL_XBAR_IRQ_CPU_ID_MPU and CSL_XBAR_TIMER4_IRQ are undeclared

/* Disconnect the XBar */
CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_MPU,gXbarInst,gXbarInst); In this CSL_XBAR_IRQ_CPU_ID_MPU is undeclared

/* Load the counter with the initial count value */
TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT);

/* Load the load register with the reload count value */
TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT);

TIMER_INITIAL_COUNT & TIMER_RLD_COUNT are undeclared.

static void TimerPRCMConfigure(void)
{
HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_TIMER4_CLKCTRL, 0x2);

while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
CM_L4PER_TIMER4_CLKCTRL) & (0x00030000)) != 0x0) ;
}

SOC_L4PER_CM_CORE_BASE & CM_L4PER_TIMER4_CLKCTRL are undeclared. I didn't find any L4 per registers in TRM.

static void DisableNMI(void)
{
uint32_t tmpRegVal;
tmpRegVal = HW_RD_REG32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE +
CTRL_CORE_NMI_DESTINATION_2);
tmpRegVal &= 0xFFFFFF00;
HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE +
CTRL_CORE_NMI_DESTINATION_2, tmpRegVal);

}

SOC_CTRL_MODULE_CORE_CORE_REGISTERS_BASE & CTRL_CORE_NMI_DESTINATION_2 are undeclared.

In which file I will get the value of macros CSL_CGEM0_5_REG_BASE_ADDRESS_REGS & CSL_GEM_TINTLN ?

Is there any document where I can search for the path of any variable, macro, etc for any peripherals?

I have searched in file:///C:/ti/pdk_k2g_1_0_16/packages/ti/csl/docs/doxygen/html/index.html but I didn't get any information on above variables and macros.

Please tell me the path of above undeclared variables and macros.

Regards,

Gaurav

over 4 years ago

0 Jianzhong Xu over 4 years ago

TI__Guru 59085 points

Hi Gaurav,

It looks like this CSL example doesn't build for K2G. Those macros are defined for AM57xx and tda2xx, but not for K2G.

Regards,

Jianzhong

0 Gaurav Aggarwal over 4 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

Is there any timer example for 66ak2g12 processor?

Regards,

Gaurav

0 Jianzhong Xu over 4 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

There are OSAL timer examples in PDK: OSAL_BasicExample_evmK2G_armTestProject and OSAL_BasicExample_evmK2G_c66xTestProject.

0 Gaurav Aggarwal over 4 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhongxu,

I am trying to create timer bare metal example. My cilent needs completely bare metal application so all interfaces APIs should be bare metal. Could you please help me in building timer bare metal example?

Regards,

Gaurav

0 Gaurav Aggarwal over 4 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhongxu,

Can you help me in Timer on priority basis? Already deadline over.

Regards,

Gaurav

0 Jianzhong Xu over 4 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Hi Gaurav,

The AM335x PDK starterware has baremetal timer examples. That can be a reference for you to implement K2G baremetal timer because the CSL API is the same. Please download the AM335x Processor SDK RTOS and take a look at pdk_am335x_1_0_17\packages\ti\starterware\examples\dmtimer.

Hope that helps.

Regards,

Jianzhong

0 Gaurav Aggarwal over 4 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

I am trying to configure Timer 4 for 1 second as below. Can you verify?

CHP_CLK1 is 1000Mhz

#define TIMER_INITIAL_COUNT 0x9EF21AA

#define TIMER_RLD_COUNT 0x9EF21AA

int main()

{

Timer_Test_1();

while(HWREG(SOC_TIMER4_BASE + 0x10)!=TIMER_INITIAL_COUNT); //wait for 1 second

}
{
printf("counter value is %x\n",HWREG(SOC_TIMER4_BASE + 0x10));
}

void Timer_Test_1(void)
{
TimerSetUp();
}

static void TimerSetUp(void)
{

/*Reset the timer module */
TIMERReset(SOC_TIMER4_BASE);

/* Enable free run in emulation mode */
TIMEREmuModeConfigure(SOC_TIMER4_BASE, TIMER_FREE);

/* Load the counter with the initial count value */
TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT);

/* Load the load register with the reload count value */
TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT);

HWREG(SOC_TIMER4_BASE + 0x24)|= ((1<<0)|(1<<1));

/* Configure the Timer for Auto-reload and compare mode */
// TIMERModeConfigure(SOC_TIMER4_BASE, TIMER_AUTORLD_NOCMP_ENABLE);

/* Configure the posted mode of TIMER */
// TIMERPostedModeConfig(SOC_TIMER4_BASE, TIMER_NONPOSTED);

/* Configure the read mode of TIMER */
// TIMERReadModeConfig(SOC_TIMER4_BASE, TIMER_READ_MODE_NONPOSTED);
}

int32_t TIMERReset(uint32_t Baseaddress)
{
/* Set the counter value */
HWREG(Baseaddress + 0x20)|= ((1<<22)|(1<<23));
}
int32_t TIMEREmuModeConfigure(uint32_t Baseaddress, uint32_t count)
{
/* Set the counter value */
//HWREG(Baseaddress + 0x10)= count;
}
int32_t TIMERCounterSet(uint32_t Baseaddress, uint32_t count)
{
/* Set the counter value */
HWREG(Baseaddress + 0x18) = count;
}
int32_t TIMERReloadSet(uint32_t Baseaddress, uint32_t count)
{
/* Set the counter value */
HWREG(Baseaddress + 0x34) = count;
}

Regards,

Gaurav

0 Gaurav Aggarwal over 4 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

Have you checked timer 4 configuration from my previous reply?

0 Gaurav Aggarwal over 4 years ago in reply to Gaurav Aggarwal

Expert 2935 points

I am polling the PRDINTSTAT_LO bit in the TIMER_INTCTL_STAT but the bit is not getting setting. How can I confirm that timer 4 module clock is enabled or not, although timer 4 registers are updating.

As CHP_CLK1 is 1000Mhz so timer 4 module clock is CHP_CLK1 /6 = 1000/6 = 166666666Hz. CLKDIV value is 6 in TIMER_EMUMGT_CLKSPD register. Will it divide further 166666666Hz by 6?

#define TIMER_INITIAL_COUNT 0x9EF21A5 //1 sec

int main()

{

HWREG(SOC_TIMER4_BASE + 0x4)|= 1<<0;//free emulation

/* Set the counter value */
HWREG(SOC_TIMER4_BASE + 0x10) = TIMER_INITIAL_COUNT ;

/* Set the period value */
HWREG(SOC_TIMER4_BASE + 0x18) = TIMER_INITIAL_COUNT ;

HWREG(SOC_TIMER4_BASE + 0x34) = TIMER_INITIAL_COUNT ;//set the period reload register

HWREG(SOC_TIMER4_BASE + 0x24)|= ((1<<0)|(1<<1));

HWREG(SOC_TIMER4_BASE + 0x20)|= ((1<<22)|(1<<23)); //enable the timer

while((HWREG(SOC_TIMER4_BASE + 0x44) & 0x2)!=0x2);
{
HWREG(SOC_TIMER4_BASE + 0x44)|=1<<1;

printf("Timer Testing\n");
}

}

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Hi Gaurav,

Sorry for not being able to look into this until now. What's your current status on this? Is it working?

Thanks,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

It's ok.

Timer is working in polling method. But I want to configure timer as a interrupt. Could you please tell me the steps for configure interrupt from scratch for this processor. I took some API for interrupt from CSL timer example but undefine reference error is there.

Could you please tell the steps with register address and configuration to configure interrupts from scratch. It would be a great help.

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Hi Gaurav,

After some research, I think the best way for you may be to use the timer API in OSAL (OS Abstraction Layer). There is test code available for K2G at: pdk_k2g_1_0_16\packages\ti\osal\test\src. You would need to use the nonos (not RTOS, i.e. baremetal) library at: pdk_k2g_1_0_16\packages\ti\osal\lib\nonos\a15\release.

Please follow instructions in this thread to build the OSAL test which includes timer testing.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

I'll check and will let you know.

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Sounds good. Thank you.

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhongxu,

Don't you have any source file in which I will get interrupt configuration from ARM to peripheral interrupt? It will be helpful to configure interrupts for other peripherals as well.

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Gaurav,

The board diagnostic test for LED on iceK2G can be a good example. Please refer to pdk_k2g_1_0_16\packages\ti\board\diag\led and pay attention to code for iceK2G, specifically:

main() -> CSL_A15_INIT_copyVectorTable() (defined in pdk_k2g_1_0_16\packages\ti\csl\arch\a15\src\csl_a15_startup.c):
- --> CSL_a15SetVectorTable (defined in pdk_k2g_1_0_16\packages\ti\csl\arch\a15\V0\csl_a15Asm.asm).
- the elements in the vector table (vecTbl[]) such as Entry, IRQHandler, etc are defined in pdk_k2g_1_0_16\packages\ti\board\diag\common\K2G\diag_entry.S.
GPIO_socSetIntMux(), GPIO_setCallback(), GPIO_enableInt(): you'll need to look into pdk_k2g_1_0_16\packages\ti\drv\gpio for details on how to setup and enable interrupts.

Hope this is helpful.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

Let me check.

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

May I know the difference among V0, V1 and V2 folders?

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Please refer to pdk_k2g_1_0_16\packages\ti\osal\build\makefile_nonos.mk. You'll find that K2G uses v0.

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Ok Jianzhongxu

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Do I need to call all these in my application to configure interrupt except GPIO?

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Gaurav,

I hope your timer application development is going well.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

Still I didn't get any success in configuring timer interrupt.

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Gaurav,

Doing bare-metal development on the A15 core is not that straightforward. We always recommend users to use SYS/BIOS which abstracts the hardware and hides the complexities.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

I know but my client needs a bare metal only so I don't have any option. If you can help beyond than it would be very helpful.

Regards,

Gaurav

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

May be you give some small piece of code for interrupt configuration from scratch for timer (from a15 core to peripheral ISR mapping, enabling interrupt) if possible. My most of the application is pending due to interrupt only. It's been so much delayed.

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Gaurav,

I think the best approach for you is to use the nonos OSAL API which is essentially baremetal. This approach was validated according to this thread which I mentioned earlier.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

I guess if I go for OSAL API then it is also not pure baremetal, am I right?

Regards,

Gaurav

0 Jianzhong Xu over 3 years ago in reply to Gaurav Aggarwal

TI__Guru 59085 points

Gaurav,

There are two versions of OSAL, TI-RTOS and nonos (bare-metal), with the same API. You can use the nonos version: pdk_k2g_1_0_16\packages\ti\osal\lib\nonos\k2g.

Regards,

Jianzhong

0 Gaurav Aggarwal over 3 years ago in reply to Jianzhong Xu

Expert 2935 points

Jianzhong,

Let me check and I'll check get back back to you in few days.

Regards,

Gaurav

0 Gaurav Aggarwal over 3 years ago in reply to Gaurav Aggarwal

Expert 2935 points

Jianzhong,

Still I am working on it, so please don't close this thread.

Regards,

Gaurav

+1 Gaurav Aggarwal over 3 years ago in reply to Gaurav Aggarwal

Expert 2935 points

still no success

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66AK2G12: Timer interrupt