If you are interested in learning more about the new AM6442 Sitara Processor family and the utilizing all of the powerful cores to solve system problems, this is a great opportunity. This is the next webinar in our monthly webinar series. There are two sessions for your convenience: one at 10AM CST for the Western Hemisphere on 11/16/2021 and another at 9PM CST (10 AM GMT + 8) for the Eastern Hemisphere 11/18/2021 (11/19/2021 in Asia). There are registration links for both sessions below.
In this webinar, we’ll be covering the Inter-Processor Communication (IPC) methods TI provides in the MCU+ SDK (IPC_Notify & IPC_RPMsg) for the R5F cores and Linux SDKs (Linux RPMsg) for the A53 cores. We'll look closer at communicating between the R5Fs using the MCU+ SDK and the R5Fs and the A53 cores running Linux.
In this webinar, learn about the IPC drivers that TI provides for AM64x. IPC drivers allow for communication between A53, R5, and M4 cores:
- Overview of IPC_Notify, IPC_RPMsg, Linux RPMsg
- Loading remote cores from Linux
- Building and running the IPC demos
Click on your desired time slot below to register now for the event:
Session 1 - 10AM CST 11/16/2021 - Western Hemisphere
Session 2 - 9PM CST 11/18/2021 (10AM GMT+8 11/19/2021) - Eastern Hemisphere
We plan to run this webinar series on a Tuesday and Thursday (Wednesday or Friday for Asia) throughout the year. In fact, two of our previous webinars from earlier in the year would provide good background information for this webinar:
- Process This: Embedded Communication And Real-Time Computing In One Chip
- Process This: Software Development Overview for AM64x Processors
Please visit this link to see our planned webinars, and view recording from all past webinars.
If you can't attend, a video link and the presentation material will be provided here shortly after the event. Subscribe to the post to get updates.
Also, please feel free to submit requests by replying below. We will consider all requests for topics that apply to TI Processors from Jacinto and Sitara.