Hello,
We have done some measurements with an Ethercat analyser (NANL-B500G-RE) on our EtherCAT bus.
Below the composition of our EtherCAT bus :
KPA Master -> Slave1(FPGA+beckhoff IP) - Slave2(FPGA+beckhoff IP) - Slave3(FPGA+beckhoff IP) - Slave4(AM3359) - Slave5(AM3359) - Slave6(AM3359) - Slave7(AM3359)
DC sync mode is used with Slave 1 as reference. We use subordinated cycles mode.
We have the following parameters:
<CycleTime>500</CycleTime>
<MailboxCycleTime>500</MailboxCycleTime>
<AutoRecoveryTimeout>100</AutoRecoveryTimeout>
<ProcessImageUpdatePeriod>500</ProcessImageUpdatePeriod>
<StatisticsUpdatePeriod>500</StatisticsUpdatePeriod>
<MaxFrameSize>1514</MaxFrameSize>
<SeparateIOUpdate>0</SeparateIOUpdate>
<DCUserShiftTime>340000</DCUserShiftTime>
<CycleTime0>62500</CycleTime0>
<CycleTime1>437500</CycleTime1>
<ShiftTime>0</ShiftTime>
We have configured the DCUserShiftTime parameter to 340us in order to position the SYNC1 event between two PDI.
We have routed PDI, SYNC0 and SYNC1 events of our AM3359 slaves on tests points and use them as GPIO inputs of the analyzer.
After powering on the slaves, starting the Master and go to OP mode, the timings are good, we retrieves 340us (DCUserShiftTime) between the beginnings of APRD and SYNC1 event.
However, if we restart only the Master, and go to OP mode, we see that SYNC1 event is shifted by a multiple of SYNC0 cycle time and so not between the PDI.
As if DCUserShiftTime is not take into account if we don't restart also the slaves.
I have some capture form the analyzer that illustrate the problem.
Do you have some ideas to explain this problem ?
Best regards,
Laurence