AM6442: R5F external interrupt

Steven Hansen

Part Number: AM6442

This is for AM6442 with MCU+SDK v08.01.

Are there any examples showing how to set up an R5F core to respond to an external interrupt via GPIO pin?

This is intended as a fast interrupt for control loops, so any hints how to ensure the ISR is running with lowest latency (FIQ instead of IRQ? ISR function and data placed into TCM by linker?) would be appreciated.

over 3 years ago

0 Frank Livingston over 3 years ago

TI__Mastermind 29198 points

Hi Steven,

Is this a No-RTOS or RTOS application?

The R5F VIM INTC supports both IRQ and FIQ, and the HWI API allows the interrupt to be specified as either IRQ or FIQ.

A bare-metal (No-RTOS) GPIO input interrupt example is documented here: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_01_00_36/exports/docs/api_guide_am64x/EXAMPLES_DRIVERS_GPIO_INPUT_INTERRUPT.html. This example uses IRQs.

HWIs are documented here: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_01_00_36/exports/docs/api_guide_am64x/KERNEL_DPL_HWI_PAGE.html

Limitations for FIQs are documented here:

Both IRQ and FIQ interrupts go through a dispatcher before entering the interrupt callback function.

For IRQ interrupts, the VIM VIC port is enabled by default and the CPU branches directly to the ISR (IRQ dispatcher) address.

The VIC port doesn't support this feature for FIQs, so the R5F must read a VIM MMR to obtain the dispatcher address before branching to the dispatcher. However, R5F FIQ mode has more banked registers than IRQ, so fewer registers (which are used) need to be context saved in the ISR.

I wasn't able to locate any example of R5F VIM/FIQ usage in the SDK.

For low-latency response, I suggest placing the interrupt dispatcher code/data in TCM, as well as the interrupt function (callback) itself. This can be achieved using the linker command file.

Regards,
Frank

0 Steven Hansen over 3 years ago in reply to Frank Livingston

Intellectual 631 points

Hi Frank,

Thank you, those examples are very helpful (not sure why I missed them the first time around). I see both FreeRTOS and bare metal don't support FPU save/restore within a FIQ interrupt.

Does this imply floating point operations are unsupported within a FIQ interrupt? Or just that we have to manually save/restore FPU context? This is one of the main use cases for us - floating point control code running on R5F in a low-latency interrupt.

-Steve

0 Frank Livingston over 3 years ago in reply to Steven Hansen

TI__Mastermind 29198 points

Hi Steven,

Steven Hansen said:
Does this imply floating point operations are unsupported within a FIQ interrupt? Or just that we have to manually save/restore FPU context?

The FIQ interrupt handler uses the TI-CLANG ARM compiler "interrupt" keyword. This is described here: https://software-dl.ti.com/codegen/docs/tiarmclang/compiler_tools_user_guide/compiler_manual/c_cpp_language_implementation/attributes/function_attributes.html?highlight=interrupt#interrupt

If the interrupted context and FIQ ISR both use floating-point registers, then the floating-point registers must be manually saved/restored in the FIQ ISR.

This would require FIQ interrupt handling similar to how the SDK handles IRQs, i.e. an assembly-language ISR is called which saves registers before a C IRQ dispatcher is called.

Regards,
Frank

0 Steven Hansen over 3 years ago in reply to Frank Livingston

Intellectual 631 points

Hi Frank,

OK, that makes sense as we've had to do the same thing on other platforms.

Does the SDK include any functions that do this? Asking so we don't re-invent the wheel in case TI already has an API to save/restore FPU registers on TI processors.

Steve

+1 Frank Livingston over 3 years ago in reply to Steven Hansen

TI__Mastermind 29198 points

Hi Steve,

I'm unable to locate a function for this purpose. However, please see these files for code which could be incorporated into your FIQ ISR:

Free-RTOS : <SDK>\source\kernel\freertos\portable\TI_ARM_CLANG\ARM_CR5F\portASM.S
No-RTOS : <SDK>\source\kernel\nortos\dpl\r5\HwiP_armv7r_handlers_nortos_asm.S

This code, for example:

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#if ENABLE_FPU_SAVE_RESTORE
FMRX  R0, FPSCR
VPUSH {D0-D15}
/* VPUSH {D16-D31} */
PUSH  {R0}
#endif
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

#if ENABLE_FPU_SAVE_RESTORE
FMRX  R0, FPSCR
VPUSH {D0-D15}
/* VPUSH {D16-D31} */
PUSH  {R0}
#endif

Perhaps the code could be made into an assembly macros.

Regards,
Frank

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AM6442: R5F external interrupt