DM365 8 bit 720P digital output with embedded sync

Hi, 

I am using DM365 to drive an OLED which takes in 720P 8bit Ycbcr 422 video input with embedded sync. 

Following are the register settings I have done to configure embedded sync and 8 bit Ycbcr output as per https://www.ti.com/lit/ug/sprufg9c/sprufg9c.pdf , sec 2.2.2.1 on Page number 45. 

{/*enable digital output*/
    write_to_mem(0x01c40004,0x00145555);//all digital video output

    write_to_mem(0x01c71f40,0x11);//enable digital lcd clock

   write_to_mem(0x01c71e04,0x6000);//VCLK pin output enable

   write_to_mem(0x01c71e08,0x20);//chroma signal up sampling enable

    write_to_mem(0x01c71e38,0x09);//BT656 enable

}

Also setting the output video clock to 74.25Mhz by setting the  following register.

__raw_writel(0x38, vpss_clkctl_reg);

When we measure the frequency of the output clock, its coming 74.25 M hz and there are no sync lines available on the vsync and hsync lines. 

I'm unable to set the output video to 720P ( 1280 x 720) resolution. 

Is  there anything I'm missing ?

Any leads on this will really help. 

Thank you,

Animesh