TDA4VM: How to integrate McSPI master and Slave example application

Hi Tanvi,

I think example is supported on MPU1_0 and MCU1_0. I doubt it is supported for mcu2_1. Could you please first try to run it using CCS and get it running? 

Then we can try using SBL in SD boot mode to load it from SD cad.

Regards,

Brijesh

Hi Brijesh,

Thank you for immediate reply.

We have to use SBL and SD-card as it is fixed requirement.

for MPU1_0 and MCU1_0 it work smoothly with SBL .

as I referred 

--> e2e.ti.com/.../3344543

We need your help for MCU2_1 as master and mcu1_0 as slave,what are the expected changes that we need to do in example?

Can you please suggest the required changes to do so?

Your help is highly appreciated.

Regards,

Tanvi

Hi Team,

as per my understanding following are the snippet where I did changes for my purpose.

but it is not working for MCU2_1 as master and MCU1_0 as slave.

------------------------------------------------------------------------------------------------

##changes made in spi_component.mk

# SPI slave Test app

ifeq ($(SOC),$(filter $(SOC), j721e j7200))
MCSPI_Slave_TestApp_$(SOC)_CORELIST = mcu1_0
else
MCSPI_Slave_TestApp_$(SOC)_CORELIST = mcu1_0
endif
export MCSPI_Slave_TestApp_$(SOC)_CORELIST
ifeq ($(SOC),$(filter $(SOC), j721e am65xx j7200))
export MCSPI_Slave_TestApp_SBL_APPIMAGEGEN = yes
endif

# SPI master Test app

ifeq ($(SOC),$(filter $(SOC), am64x))
MCSPI_Master_TestApp_$(SOC)_CORELIST = mcu1_0 mpu1_0
else
MCSPI_Master_TestApp_$(SOC)_CORELIST = mcu2_1
endif
export MCSPI_Master_TestApp_$(SOC)_CORELIST
ifeq ($(SOC),$(filter $(SOC), j721e am65xx j7200 am64x))
export MCSPI_Master_TestApp_SBL_APPIMAGEGEN = yes
endif

------------------------------------------------------------------------------------------------

##changes made in packages/ti/drv/spi/example/mcspi_slavemode

# Master running on mcu2_1 core, use the common linker command file in build
ifeq ($(CORE), mcu2_1)
CFLAGS_SPI_MS = -DMCSPI_MASTER_TASK
APP_MASTER_SLAVE = Master
endif
ifeq ($(SOC),$(filter $(SOC), j721e j7200))
# Slave uses local linker command file to avoid code/data memory conflict with master application
ifeq ($(IS_BAREMETAL),yes)
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_mcu.lds
else
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/mcu2_1/linker_r5_sysbios.lds

endif
endif
endif
endif

ifeq ($(SOC),$(filter $(SOC), j721e j7200))
# Slave uses local linker command file to avoid code/data memory conflict with master application
ifeq ($(IS_BAREMETAL),yes)
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_mcu.lds
else
EXTERNAL_LNKCMD_FILE_LOCAL = $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_mcu_sysbios.lds

endif
endif

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

#changes made in main_mcspi_slave_mode.c

static uint32_t SPI_test_get_instance (uint32_t testId, bool master)
{
uint32_t instance;

/* Soc configuration structures indexing starts from 0. If the IP
* instances start with 1, to address proper Configuration
* structure index, McSPI Instance should be substracted with 1
*/
if (master == (bool)true)
{
instance = (uint32_t)BOARD_MCSPI_MASTER_INSTANCE - 1;
}
else
{
instance = (uint32_t)BOARD_MCSPI_SLAVE_INSTANCE - 1;
}
#if defined (SOC_AM65XX) || defined(SOC_J721E) || defined(SOC_J7200)
/*
* For AM65XX/J721E/J7200 SoC, master/slave test is set up to use
* McSPI 2 on the MCU domain for master and McSPI 4 on the
* Main domain for slave, for loopback test it uses default
* board McSPI instance
*/
if (testId < SPI_TEST_ID_LOOPBACK)
{
if (master == true)
{
instance = 3U; //considering MCSPI3 as master in main domain
}
else
{
instance = 1U;//considering MCU_MCSPI1 as slave in mcu domain
}
if ((testId == SPI_TEST_ID_TIMEOUT) ||
(testId == SPI_TEST_ID_TIMEOUT_POLL))
{
/*
* Timeout test is done in slave mode,
* on the McSPI 2 on MCU domain
*/
instance = 3U;//2U
}

}
#endif

return (instance);
}

---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

OUTPUT STUCK  @

SBL Revision: 01.00.10.00 (Dec 24 2021 )
TIFS ver: 21.1.1--v2021.01a (Terrific a

can anyone guide further,where I need to modifications.

Regards,

Tanvi

Hi Tanvi,

First can you just rebuild this example for mcu2_1 and try to run it on the EVM? Then you could change it for your requirement. 

There is a similar discussion on below thread.. can you follow it? Essentially, we can rebuild pdk libraries for all cores using pdk_libs_allcores and then change component.mk to allow building master application for mcu2_1..

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1060759/tda4vm-tda4vm-tda4---about-the-delay-time-after-spi-transmission-is-completed/3940992#3940992

Regards,

Brijesh