Hi,
I looked into this thread, however I don't think the main question was answered regarding read (the accepted answer was about write) https://e2e.ti.com/support/processors-group/processors/f/processors-forum/667857/tmdxidk5718-qspi-in-memory-mapped-mode/2540557#2540557
My question is, I looked at the TRM and on the section 25.5.4.1.2 SFI Translator, it says, for linear addressing mode, action 5 is repeated until the byte count reaches zero. From my interpretation of this statement, the QSPI can perform sequential reads? is that correct?
What I would like to achieve is something like this:
Read 512 bytes:
Chip select low, send read instruction, address, dummy byte, read data 0, read data 1, .... read data 511, Chip select high
But what I am seeing from the oscilloscope is that it keeps on sending the address and instruction, resulting in poor performance.
Chip select low, send read instruction, address, dummy byte, read data 0 (8 bit clock), Chip select high
Chip select low, send read instruction, address, dummy byte, read data 1 (8 bit clock), Chip select high
.....
Chip select low, send read instruction, address, dummy byte, read data 512 (8 bit clock), Chip select high
From the datasheet of the flash, it says, it can do sequential read from 0x000000 up to the end of the flash and will automatically increment the address inside. If this is true, I believe repeatedly sending the address isn't needed. But I can't figure out how to eliminate the repeated sending of the address or if it is possible to do that with the QSPI module. I even changed the FLEN but it doesn't seem to have any effect on memory mapped mode.
I was able to do this in configuration mode, but that mode is slow:
Chip select low, send read instruction, address, dummy byte, read data 0, read data 1, .... read data 511, Chip select high
If a sequential read is not possible on mem map mode, are there any other options to achieve the highest performance possible on reading contiguous blocks of data (without resorting to dma nor interrupts)?
thanks
