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AM6442: Combined tiboot3.bin and DMSC watchdog

Part Number: AM6442

Dear TI team,

recently I noticed that newer TI processor SDK's (Linux) for the AM64x use a combined tiboot3.bin image that contains the R5f SPL and the SYSFW firmware for the DMSC.

I have a question regarding the DMSC watchdog functionality in the context of these combined images:

Previously, with separate SPL and SYSFW images, there was a watchdog controlled by the DMSC that would reset the target if a) the SPL image failed to load within 3 minutes or b) the SPL failed to load the SYSFW image within another 3 minutes.

It seems that with the combined images the DMSC watchdog is disabled already by the time the R5f enters the first instructions of the SPL. I've put an endless loop among the first instructions of my SPL, and the system would sit there "forever", waiting for the debugger to attach.

While this is actually nice during development, I wonder if there's a way to have the watchdog enabled until the SPL has reached a state where it is able to communicate with the SYSFW. That would give us a chance to configure another watchdog from the SPL, so that at any point the system would reset eventually if something went wrong.

The AM64x doesn't talk about the combined images at all, so obviously there's no documentation about this behavior. Is the watchdog being disabled by the DMSC ROM or by the SYSFW image? Is the watchdog behavior configurable?

Regards,

Dominic

  • Hi Dominic,

    Yes,  some K3 devices like the J7200 and AM64 ROM supports a combined boot image boot flow. In this flow, the first boot binary has both SBL/SPL and SYSFW embedded in the boot image with a single x.509 certificate. This helps with the following situations:

    • Allows ROM to load and run both the SBL/SPL and SYS-FW in parallel.
    • Optimizes ROM boot time by minimizing different x.509 certificate parsing and authentication.

    There’s a newly added section on Board Configuration with ROM Combined Image format

    https://software-dl.ti.com/tisci/esd/latest/3_boardcfg/BOARDCFG_COMBINED_IMG_FORMAT.html#board-configuration-with-rom-combined-image-format

    I’m checking with internal teams on your specific questions, and will get back to you.

    Is the watchdog being disabled by the DMSC ROM or by the SYSFW image? Is the watchdog behavior configurable?

    Best,

    -Hong

  • Hi Dominic,

    Even in the combined image boot flow, the DMSC watchdog timer is still enabled. However, the difference is that compared to the legacy boot method with SPL-loading, SYSFW begins execution immediately from the ROM boot process without any SPL intervention. At that time the SYSFW is servicing the watchdog in a periodic loop based on its local tick timer. The SPL should be able to immediately communicate with SYSFW in this boot method.

    There is no control exposed for DMSC watchdog and no plan to support this in the future.

    -Stephen