Hi Team,
Thanks for the quick replies for my previous queries. However, there are still some where i am stuck. I have addressed them as points for a better clarity.
1. Regarding FAQ --> "e2e.ti.com/.../faq-tda4vm-different-ways-to-load-an-rtos-or-baremetal-application-along-with-linux" has there been any updates for PDK 07_03 ?
2. I want to build IPC SPI profiling application for which i was using --> "software-dl.ti.com/.../mcusw_c_ug_top.html how one should link
- ipc_spi_slave_demo_app_mpu1_0_release.xa53fg would be hosted on Remote Core (MPU 1 0).
- ipc_spi_master_demo_app_mcu1_0_release.xer5f would be hosted on Local Core (MCU 1 0)
These two binaries is not given. I want to use SPL to boot them.
I have searched most of the forums but haven't found any clue to do so.
3. I have used UBOOT_DM variable to link one binary but how should one link another binary I couldn't find. This i want to understand as along with linux I want to boot multiple cores.
4. All the other cores have a linker
j7-c66_0-fw
j7-c66_1-fw
j7-c71_0-fw
j7-main-r5f0_0-fw
j7-main-r5f0_1-fw
j7-mcu-r5f0_0-fw
But no linker related to mpu1_0 is there. How should i link ipc_spi_slave_demo_app_mpu1_0_release.xa53fg ?
5. In case of mcu2_1 as slave (ipc_spi_slave_demo_app_mcu2_1_release.xer5f) & mcu1_0 as master (ipc_spi_master_demo_app_mcu1_0_release.xer5f), how should they be integrated ?
These are some of my blockers, if i can get a slight guidance i would be able to move ahead.
I am not using CCS.
I hope to get a clarity in the above mentioned steps.
Thanks & Regards,
Tanvi