TDA4VM: TDA4VM MCU3_0 udma Sciclient_rmIrqSetRaw failed

xu jerry

Prodigy 116 points

Part Number: TDA4VM

Hi TI,

I used your reference code (app_gpio_dma.c), and run on MCU2_0/1 is fine.

but i found failures when execute Sciclient_rmIrqSetRaw() on MCU3_0.

Then, i found that return flags of function was always 0.

(Sciclient_readThread32(rxThread, 1U+gSecHeaderSizeWords);

Code:

pdk_jacinto_07_03_00_29/packages/ti/drv/sciclient/src/sciclient/sciclient.c

int32_t Sciclient_serviceSecureProxy(const Sciclient_ReqPrm_t *pReqPrm,
                                     Sciclient_RespPrm_t      *pRespPrm)
{
   ...
    if(status == CSL_PASS)
    {
        numWords   = (uint32_t) (rxPayloadSize / 4U);
        trailBytes = (uint8_t) (rxPayloadSize - (numWords * 4U));
        /* Read the full message */
        pRespPrm->flags = Sciclient_readThread32(rxThread, 1U+gSecHeaderSizeWords);
        
        ...
    }
    ....
}

And my code is : (this function Input params : gpioidx = 25, chIdx = 0)

void App_setupGpioMuxIr(uint32_t gpioIdx,uint32_t chIdx)
{
	int32_t status;
	struct tisci_msg_rm_irq_set_req rmIrqReq;
	struct tisci_msg_rm_irq_set_resp rmIrqResp;

	memset(&rmIrqReq, 0x0, sizeof(rmIrqReq));
	memset(&rmIrqResp, 0x0, sizeof(rmIrqResp));

	rmIrqReq.valid_params = 0U;
	rmIrqReq.global_event = 0U;
	rmIrqReq.src_id = 0U;
	rmIrqReq.src_index = 0U;
	rmIrqReq.dst_id = 0U;
	rmIrqReq.dst_host_irq = 0U;
	rmIrqReq.ia_id = 0U;
	rmIrqReq.vint = 0U;
	rmIrqReq.vint_status_bit_index = 0U;
	rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

	rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

	rmIrqReq.src_id = TISCI_DEV_GPIOMUX_INTRTR0;
	rmIrqReq.src_index = gpioIdx;

	/* Set the destination based on the core */
	rmIrqReq.dst_id = TISCI_DEV_GPIOMUX_INTRTR0;
	rmIrqReq.dst_host_irq = GPIOMUX_INTRTR0_OUTP_START_R5FSS0 + chIdx;

	/* Set the destination interrupt */
	rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
	rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;

	status = Sciclient_rmIrqSetRaw((const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,&rmIrqResp,SCICLIENT_SERVICE_WAIT_FOREVER);

	if(status == CSL_PASS)
	{
		App_print ("Worked fine \n");
	}
	else
	{
		App_print ("Failed \n");
	}
}

I think that these parameters rmIrqReq.src_id ,rmIrqReq.dst_id and rmIrqReq.dst_host_irq should be set correctly for MCU3_0.

But I hope you can give me some pointers.

Thanks.

Jerry

over 3 years ago

0 Brijesh Jadav over 3 years ago

TI__Guru**** 479995 points

Hi Jerry,

Few questions,

- What is the value of GPIOMUX_INTRTR0_OUTP_START_R5FSS0 macro? I think we have allocated some 4 outputs for each main domain r5f in the resource manager, so if this start is not correct or not for this r5f, it will fail.

- How many GPIO output interrupt do you want to allocate? We have allocated by default only 4 output interrupts for each main r5f..

Regards,

Brijesh

0 xu jerry over 3 years ago in reply to Brijesh Jadav

Prodigy 116 points

Hi Brijesh Jadav,

Thanks. Your advice was a great help to me.

Indeed, it is GPIOMUX_INTRTR0_OUTP_START_R5FSS0 that does not match my RM setting, I have fixed it.

I need 12 GPIO output interrupts. Now,how to expand to 12 from 4?

My every core(A72/R5F/C6x/C7x) is working now, Is it that we have to release other cores to the mcu3_0 ?

Thanks very much.

BRs.

Jerry

0 Brijesh Jadav over 3 years ago in reply to xu jerry

TI__Guru**** 479995 points

Hi xu jerry,

Yes, for 12 GPIO IRQ and 12 UDMA channels, we have to allocate them from the other cores.. If you are not using GPIO Interrupt on other cores, we can allocate them all for mcu3_0.

Which SDK release are you using?

Regards,

Brijesh

0 xu jerry over 3 years ago in reply to Brijesh Jadav

Prodigy 116 points

Hi Brijesh,

Thank you for your quick response.

I used SDK_07_03, if i have to allocate them from the other cores, I try to do it myself.

Thanks very much.

BRs.

Jerry

0 Brijesh Jadav over 3 years ago in reply to xu jerry

TI__Guru**** 479995 points

Hi Jerry xu,

Sorry, did not get it. Do you want me to change the resources for this in SDK7.3 release?

Regards,

Brijesh

0 xu jerry over 3 years ago in reply to Brijesh Jadav

Prodigy 116 points

Hi Brijesh,

I hope to keep the other core's GPIOMUX_INTRTR0 setting unchanged,

and mcu3_0 also get 12 output of interrupts, It doesn't seem feasible.

So, my mean I'm going to try to modify rm-cfg.c, by moving some GPIOMUX_INTRTR0 to mcu3_0.

Thanks.

+1 Brijesh Jadav over 3 years ago in reply to xu jerry

TI__Guru**** 479995 points

Hi xu jerry,

Sure, please try changing rm-cfg.c file..

Regards,

Brijesh

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TDA4VM: TDA4VM MCU3_0 udma Sciclient_rmIrqSetRaw failed