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TDA4VM: Does the QNX system need the memory map configuration as Linux ?

Ruifeng Zhang
Intellectual 570 points
Part Number: TDA4VM

Hi ,

Our board used two TDA4VM SoC and QNX OS.

We developed the PCIE feature for communicate between two SoC and it used the physical memory address "0x8_C000_0000" for 1G size.

From the following link: 8.9. Understanding and updating SDK memory map for J721E — Processor SDK RTOS J721E

I understand that the following files need to be modified in the Linux system. Is it necessary in the QNX system?

  • Linker command files for various RTOS CPUs

    ./c66x_1/linker_mem_map.cmd
./c66x_2/linker_mem_map.cmd
./c7x_1/linker_mem_map.cmd
./mcu2_0/linker_mem_map.cmd
./mcu2_1/linker_mem_map.cmd

  • Memory map .h file that is used by various system init, mmu/mpu init functions

    ./app_mem_map.h

  • Linux DTS file snippets to copy/paste into linux DTS/DTSO files

    ./k3-<soc>-rtos-memory-map.dts

  • A human readable html table showing the different memory map sections

    ./system_memory_map.html
  • 0
    TI__Guru** 120101 points

    Hi,

    As you have referenced system_memory_map.html, will respond with the assumption that Vision Apps framework is in use.   The QNX build for the vision apps framework will generate a system_memory_map.html, (./vision_apps/platform/${SOC}/rtos/system_memory_map.html) similar to what Linux does.  This memory map lists out the memory that the Vision Apps framework, including remote cores, will require to function.

    When the QNX HLOS is started it needs to ensure it is not using the memory specified by the system_memory_map.html.   This is documented as part of PSDK QNX documentation 9.3. How To Take Care Of Remote Core Memory Map Updates — Processor SDK QNX J721E (ti.com).    The PSDK QNX SDK will have defaults configured to match the Vision Apps default settings for QNX.   Any memory changes made for Vision Apps would need to be accounted for as per provided link above.

    When the QNX PCIE driver is started, the memory it is claiming must not overlap with the memory definitions in system_memory_map.html.

    Regards,

    kb

  • 0 in reply to KB
    Intellectual 570 points

    Hi KB,

    Could you provide the path of system_memory_map.html in SDK8.1 ?

    Thanks.

  • 0 in reply to Ruifeng Zhang
    TI__Guru** 120101 points

    The ./ti-processor-sdk-rtos-j721e-evm-08_01_00_11/vision_apps/platform/j721e/rtos/system_memory_map.html should be referenced.

    Regards,

    kb

  • 0 in reply to KB
    Intellectual 570 points

    Hi KB,

    Earlier, I provided the issue that TDA4VM: If both PCIE and TIDL processes are enabled at the same time, they will hang up. - Processors forum - Processors - TI E2E support forums.

    The TIDL using the physical address 0x8_8000_0000 ~ 0x8_9000_0000 but it does not reserve on QNX.

    In my understand, the malloc will allocate the memory from both /memory/ram/sysram and /memory/below4G/ram/sysram and it will overlay with the TIDL.

      02a0) 0000000880000000-00000008bcfdefff o:0060 a:0027 p:100 c:0 n:/memory/ram/sysram

    Is this a issue and how to fix it? Or is there something TI has done that I haven't noticed?

  • 0 in reply to Ruifeng Zhang
    TI__Guru** 120101 points

    Hi,

    If the Vision Apps framework system_memory_map.html, is showing that  0x8_8000_0000 to 0x8_9000_0000 is being used, then that memory range should not be available to the QNX HLOS, as you are seeing above.

    Please try re-testing with an updated qnx-ifs, built using a modifed psdkqa/qnx/bsp/images/j721e-evm-ti.build, with the modification below, or the equivalent for the memory map being used in your system

    [+keeplinked] startup-j721e-evm -v -r0xA0000000,0x60000000,1 -r0x880000000,0x10000000,1 -d

    The intent of this entry is to "carve out" the below memory regions such that are not available to QNX.

    0x0_A000_0000 to 0x1_0000_0000  

    0x8_8000_0000 to  0x8_9000_0000 

    Regards,

    kb

  • 0 in reply to KB
    Intellectual 570 points

    Hi KB,

    As the previous thread, I have already try to reserve the 0x8_8000_0000 ~ 0x8_9000_0000 on the QNX. BUT, the TIDL test program will abnormal and it doesn't output any log later.

    So I guess the TIDL program also used the memory 0x8_8000_0000 ~ 0x8_9000_0000 on QNX.

    Could you please test this change locally, thank you.

  • 0 in reply to Ruifeng Zhang
    TI__Guru** 120101 points

    Hi,

    I'm not clear on the overall issue:

    Regarding memory carveout:

    The below memory carveout, is intended to reserve 256MB for TIDL starting at  0x8_8000_0000.   

    [+keeplinked] startup-j721e-evm -v -r0xA0000000,0x60000000,1 -r0x880000000,0x10000000,1 -d

    With this entry in the BSP build file, the QNX HLOS will not allocate memory from this range.    To make sure the memory carveout is in place the "pidin syspage=asinfo" can be run.  This provides QNX HLOS view of memory.

    The entry in the BSP build file does not prevent an application/driver such as PCIe from memory mapping to a physical address within that range.   Care must be taken to ensure no applications / drivers on the A72, are explicitly using this memory range.   A review of "pidin map" output may be helpful, look for any use of addresses in that range.  There should be none.

     

    Regarding TIDL Issue

    With the carveout verified to be in place using "pidin syspage=asinfo", is an issue seen?

    If PCIe is removed from the test case, is an issue seen?

    If so what is the issue?  Please provide the vision_app_init.sh logs, and "pidin syspage=asinfo" and "pidin map" output.

    Regarding Testing

    TI does test with the above carveout with no known TIDL issues.  TI does not test with PCIe driver as that is a QNX deliverable

    Regards,

    kb

  • 0 in reply to KB
    Intellectual 570 points

    Hi KB,

    I found it is reserved from 0xA0000000 for size 0xA0000000 in SDK8.0.

    In my opion, the TDA4VM memory physical address should be 0x8000_0000 ~ 0xFFFF_FFFF and 0x8_8000_0000 ~ 0x8_FFFF_FFFF.

    Why TI reserved the memory from 0xA0000000 for size 0xA0000000 ? It is overflow physical memory address. What does that mean?

  • 0 in reply to Ruifeng Zhang
    TI__Guru** 120101 points

    Hi,

    The entry in the build file should align with the ti-processor-sdk-rtos-j721e-evm-08_00_00_12/vision_apps/apps/basic_demos/app_rtos/rtos_qnx/system_memory_map.html.

    As you have noted, and is discussed above, in the thread

    KB said:

    Please try re-testing with an updated qnx-ifs, built using a modifed psdkqa/qnx/bsp/images/j721e-evm-ti.build, with the modification below, or the equivalent for the memory map being used in your system

    [+keeplinked] startup-j721e-evm -v -r0xA0000000,0x60000000,1 -r0x880000000,0x10000000,1 -d

    The intent of this entry is to "carve out" the below memory regions such that are not available to QNX.

    0x0_A000_0000 to 0x1_0000_0000  

    0x8_8000_0000 to  0x8_9000_0000 

    The entry  

    [+keeplinked] startup-j721e-evm -v -r0xA0000000,0xA0000000,1 -d, 

     should be replaced with the below to align with the html file. 

    [+keeplinked] startup-j721e-evm -v -r0xA0000000,0x60000000,1 -r0x880000000,0x10000000,1 -d

    Regards,

    kb