TMS320C6678: TMS320C6678 EVM board (DSPM-8301E) , Advantech, SGMII link does not come up

Hi Danilo,

Kindly look in following links for TSIP clock during power up sequence.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/922243/tms320c6678-tsip-clocks-while-power-up-sequence

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/942959/tms320c6678-tsip-clocks-while-power-up-sequence

We are also analysing whether FPGA in C6678 EVM might be root cause of this issue.

Thanks,

Rajarajan U

Hi Danilo, Hi Raj,

   This seems like a good theory.  The problem is that the Ti C6678 EVM board is iresponsible for the power-up sequencing. An FPGA on that EVM board apparently is responsible for this functionality,   and we have no control over it. It is designed by TI/Advantec.   We need TI/Advantec to examine their design with regard to your suggestion.

thanks,

Rick

Hi Rick,

rick szajdecki said:

The problem is that the Ti C6678 EVM board is iresponsible for the power-up sequencing. An FPGA on that EVM board apparently is responsible for this functionality,   and we have no control over it. It is designed by TI/Advantec.   We need TI/Advantec to examine their design with regard to your suggestion.

Thanks for the observation, we do agree on this. Notified the FPGA team about the issue and they are working on it.

Thanks

Rajarajan U

Hi Rajarajan.

Is there any update from the FPGA team?   It is a serious issue for our development organization, and affecting our ability to deliver our solution with the TI C6678 device.

Hi Rick,

Sorry for the delayed response. We have forwarded this query to FPGA experts. They will provide the response ASAP

Thanks,

Rajarajan U