TDA4VM: Left most outputs are being missed on EVM

Hi Mudasar,

Could you please try with SDK 8.1 release ( as 7.1 is quite an old release), it might be some issue which we have already fixed in the latest release.

Thanks,

Praveen

Hi Praveen,

Sorry we can't upgrade sdk, can you please help with sdk7.01?

Hi Mudasar,

Can you generate layer level traces and identify from which layer onwards mismatches are starting, you can refer to section "TIDL-RT: Troubleshooting Guide for Accuracy/Functional Issues" for more details"

Thanks,

Praveen

Hi Praveen,

thank you for quick response any link to that document?

Hi Praveen,

debugTraceLevel = 2

writeTraceLevel = 1  

are working for host emulation only, can you please elaborate how to enable it in EVM mode?

Hi Mudasar,

Please refer to below link,

https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/08_01_00_11/exports/docs/tidl_j7_08_01_00_05/ti_dl/docs/user_guide_html/md_tidl_fsg_steps_to_debug_mismatch.html

Thanks,

Praveen

Hi Praveen,

Thank you for sharing, I have seen and found this 

root@ j7-evm:~# cd /opt/tidl_test
root@ j7-evm:/opt/tidl_test# export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/lib
root@ j7-evm:/opt/tidl_test# ./TI_DEVICE_a72_test_dl_algo_host_rt.out

but this is for linux system, can you please share same for qnx?

Thank you

As of now build of "TI_DEVICE_a72_test_dl_algo_host_rt.out" is not supported in QNX SDK. We are working on adding this support in the next SDK release.

To make progress for now, could you please use Linux-based PSDKR to debug and isolate this issue. Once the problem is fixed, you can continue to use QNX based flow

 Yes, I have prepared the Linux sdk, thank you