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[FAQ] TDA4VM: Maximum pressure or force allowed on package lid of SoC

Part Number: TDA4VM

For the following SoCs:

  • AM57x
  • DRA6x
  • DRA7x
  • DRA8x
  • TDA2x
  • TDA3x
  • TDA4x
  • (And probably any other SoC created by TI, all of which use similar styles of solder balls)

FAQ: How much pressure is allowed to be placed onto the lid of an SoC package.  The background for this question is related to the various tolerances that exist on the height of the SoC package, as well as the tolerances that exist in a customer’s chassis design, with an end goal of placing “enough but not too much” pressure between the chassis lid (usually serving as a heat sink) and the thermal interface material that is commonly placed between the chassis lid and the SoC package.

There are several e2e threads that address this question:

The detailed answer is related to at what point will the solder balls start to collapse.  This is related to the solder ball size and temperature of the system.  There are tables in some of the threads that give max pressure estimates for different solder ball configurations vs 5, 10, 15, 20 years and temp 70, 90, 100C.  

If we take the worst case scenario, 33g is the max pressure that can be applied over 20 years at 100C to a 0.65mm ball pitch.  0.8mm, lower time, or lower temp can support more pressure.

If we use 33g as the limit, scaled by 760 pins (different SoCs have different number of pins, but this is at the low end of the AM57/TDA/DRA product portfolio, that results in a maximum of 25 kgf of *uniform* force, which is equivalent to 55 lbf or 245 Newtons.

That number should be margined to account for non-uniform force.  The amount of margin that is desired can be end user specific.  I usually recommend 6x-10x margin, and a max pressure between 6 to 10 lbf, which seems like a reasonable “common sense” answer to how much pressure would give reasonable compression of thermal interface material and stay far away from the theoretical limit.  The customer should confirm their final target based on their own tolerances and thermal interface material's optimal pressure.