TDA4VM: How to set POK TRIM

Zhihua Ding

Part Number: TDA4VM
Other Parts Discussed in Thread: DRA821,

Hello,

Could you help me on how to set the POK_TRIM which is used as the threshold of voltage monitor? What's the resolution per bit?

Do you have some experience value about threshold for 14POKs?

Thank you!

Best Regards,

Zhihua

over 3 years ago

0 KB over 3 years ago

TI__Guru** 110541 points

Hi Zhihua,

There are a few threads on POK:

Where to find POK UV/OV sample code:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1068561/tda4vm-power-ok-pok-test-for-diagnostic-implementation

Some details on Trim values

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/942706/tda4vm-power-ok-pok-modules

Enabling POK modules

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1090769/faq-tda4vm-enabling-pok-modules

In regards to your question on the trim value step sizes are documented in /packages/ti/csl/src/ip/pok/V0/csl_pok.h.

Regards,

0 Zhihua Ding over 3 years ago in reply to KB

Intellectual 460 points

Thank you！It helps!

0 Zhihua Ding over 3 years ago in reply to KB

Intellectual 460 points

Hi KB

A followup question. I still don't understand how to set the trim. The resolution seems not match with the range. eg, 0.0125*127(7bits) = 1.5875V, 1.65-0.725 = 0.895V. Could you elaborate more? Thank you!

Best Regards

Zhihua

0 KB over 3 years ago in reply to Zhihua Ding

TI__Guru** 110541 points

Hi Zhihua,

Please reference the below thread, to see how set the trim value. An offset is required in addition to what is currently being done, in your calculations above.

(+) DRA821U: Could you please help us clarify the pin E17 VMON2_IR_VEXT1P8 factory trim OV/UV triger voltage value. - Processors forum - Processors - TI E2E support forums

While this thread is for DRA821, the same TRIM values apply for TDA4VM. Table below is from this thread.

As a general statement, expectation is that these fields should only be modified as part of error injection test, to validate they are functional, which is done as part of the safety case. The trim values are set by TI in the factory to appropriate UV/OV levels for the rails that they are mapped to.

Regards,

POK_TRIM [6:0]	CORE_POK UV (OVER_VOLT _DET = 0)	CORE_POK OV (OVER_VOLT _DET = 1)	1P8_POK UV (OVER_VOLT _DET = 0)	1P8_POK OV (OVER_VOLT _DET = 1)	3P3_POK UV (OVER_VOLT _DET = 0)	3P3_POK OV (OVER_VOLT _DET = 1)
0x00	0.475 V	0.725 V			1.425 V	2.175 V
0x01	0.4875 V	0x7375 V			1.4625 V	2.2125 V
0x02	0.50 V	0.75 V			1.5 V	2.25 V
…
0xC				1.432 V
0xD				1.452 V
0xE				1.473 V
…
0x20			1.432 V
0x21			1.452 V
0x22			1.473 V
…	0.475 V + POK_TRIM[7:0] *0.0125 V	0.725 V + POK_TRIM[7:0] *0.0125 V	0.7775 V + 0.02045* POK_TRIM[7:0]	1.1865 V + 0.02045* POK_TRIM[7:0]	1.425 V + POK_TRIM[7:0] *0.0375 V	2.175 V + POK_TRIM[7:0] *0.0375 V
0x2D						3.8625
0x2E				2.127V		3.9
0x2F				2.148 V		3.9375
0x30				2.168 V
…
0x42			2.127 V		3.9 V
0x43			2.148 V		3.9375 V
0x44	1.325 V		2.168 V		3.975 V
0x45	1.3375 V
0x46	1.35 V
…
0x48		1.625 V
0x49		1.6375 V
0x4A		1.65 V