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AM3352: How to take care for clock frequency configuration to use the higher frequency parts instead of AM3352BZCZ30?

Kuerbis
Expert 4145 points
Part Number: AM3352
Other Parts Discussed in Thread: AMIC110

Hi Team,

The customer is using AM3352BZCZ30 for their product.  But they have to consider to use the higher frequency parts like AM3352BZCZ60, AM3352BZCZD80 or other due to device shortage.

They want to use the higher frequency parts at same frequency of AM3352BZCZ30.

How to take care for clock frequency configuration to use the higher frequency parts instead of AM3352BZCZ30?

What a kind of S/W change is required?

OS : TI-RTOS

They are set the clock frequency by RTSC Platform as below.  And don't set the clock by their c code.

Thanks and Best regards,

 Kuerbis

  • 0
    TI__Mastermind 49395 points

    Hello Kuerbis,

    The clock setting in RTSC platform does not change the actual CPU clock frequency, but only informs BIOS what the CPU frequency is. To change the actual CPU clock frequency, they can modify the SBL code. Please refer to this thread for more information:

    AM3359: How can I figure out the MPU frequency setting on AM3359 ICEv2 with PSDK RTOS?

    Please also note that TI has stopped supporting TI-RTOS based SW development for AM335x. Please refer to the announcement and find consolidated resources there.

    Regards,

    Jianzhong

  • 0 in reply to Jianzhong Xu
    TI__Expert 4145 points

    Hi Jianzhong,

    Thank you for you reply.

    Would you please teach me where is default frequency parameter defined like following parameter in SBL?

    SblPlatformPllMpuInit(mpuDpllMult, mpuDpllDiv, mpuDpllP

    Is EFUSE_SMA register value used to set default frequency?

    What a kind of point does the customer have to take care when they need to clock down?

    Thanks and Best regards,

     Kuerbis

     

  • 0 in reply to Kuerbis
    TI__Mastermind 49395 points

    Hello Kuerbis,

    If you look at pdk_am335x_1_0_17\packages\ti\starterware\bootloader\src\am335x\sbl_am335x_platform_pll.c, you'll find the values of the 3 parameters of function SblPlatformPllMpuInit(). For example, for all supported EVMs except ICE AMIC110, the values are:

    mpuDpllDiv = 0U;
mpuDpllMult = 25U;
mpuDpllPostDivM2 = 1U;

    Then the MPU frequency = input_clock_freq * mpuDpllMult / (mpuDpllDiv+1) / mpuDpllPostDivM2 = 24MHz * 25 / (0+1) / 1 = 600MHz.

    Regarding your original question:

    Kuerbis said:

    How to take care for clock frequency configuration to use the higher frequency parts instead of AM3352BZCZ30?

    The higher frequency parts can be configured to run at higher frequencies, but the actual frequency really depends on the input clock/voltage and the PLL configurations. Let me loop in our HW expert to comment further.

    Regards,

    Jianzhong

  • 0 in reply to Jianzhong Xu
    TI__Guru 59545 points

    There will not be any hardware issues operating a higher speed grade device at reduced frequencies. However, you may need to modify your software if it reads registers to determine device capabilities and configures operating frequency based on device speed grade.  I'm not familiar with how this is implemented in the various software packages, but suspect it is a bigger concern if you were using Linux.

    Regards,
    Paul