Hi TI,
We use DDR(MT53D1024M32D4DS-053:B(4GB,4266MHz)) in our custom board and config the new DDR parameter(k3-j721e-ddr-evm-lp4-3200.dtsi for SPL, board_ddrRegInit.h for SBL) according spracu8.pdf
It can boot in my custom board via SPL+SD bootup, but it will hang at "Initlialzing DDR ..." when use SBL+OSPI Flash boot up.
I try to add some debug message in board_ddr.c and lpddr4.c when initialize DDR and found it hang in LPDDR4_StartSequenceController() function.
This is my diff about lpddr4.c file
diff --git a/packages/ti/csl/src/ip/lpddr/V0/priv/lpddr4.c b/packages/ti/csl/src/ip/lpddr/V0/priv/lpddr4.c
index 3b7f228..0924a9b 100644
--- a/packages/ti/csl/src/ip/lpddr/V0/priv/lpddr4.c
+++ b/packages/ti/csl/src/ip/lpddr/V0/priv/lpddr4.c
@@ -47,6 +47,9 @@
#include "lpddr4_ctl_regs_rw_masks.h"
#endif
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/uart/UART.h>
+
#ifndef LPDDR4_CUSTOM_TIMEOUT_DELAY
#define LPDDR4_CUSTOM_TIMEOUT_DELAY 100000000U
#endif
@@ -248,6 +251,7 @@ uint32_t LPDDR4_Start(const LPDDR4_PrivateData* pD)
uint32_t result = 0U;
uint32_t regVal = 0U;
+ UART_printf("[xxx] in LPDDR4_Start start\n");
result = LPDDR4_StartSF(pD);
if (result == (uint32_t)CDN_EOK) {
LPDDR4_CtlRegs* ctlRegBase = (LPDDR4_CtlRegs*)pD->ctlBase;
@@ -258,8 +262,11 @@ uint32_t LPDDR4_Start(const LPDDR4_PrivateData* pD)
CPS_REG_WRITE((&(ctlRegBase->LPDDR4__PI_INIT_LVL_EN__REG)), regVal);
/* Start PI init sequence. */
+ UART_printf("[xxx] LPDDR4_StartSequenceController start\n");
result = LPDDR4_StartSequenceController(pD);
+ UART_printf("[xxx] LPDDR4_StartSequenceController end\n");
}
+ UART_printf("[xxx] in LPDDR4_Start end\n");
return result;
}
The MCU uart log output is:
I upload the DDR config file board_ddrRegInit, I hope it will be helpful to investigate the problem.
SDK Version is 07.03.
BR.
Sancho
