AM6548: ICSSG ethernet port lunch on SDK8_02

Eric Hsieh4

Expert 1300 points

Part Number: AM6548

Hi Ti,

We are working on Ti EVM board with Linux SDK 08_02_00_01.

When we are using icssg ethernet port, there are something want to clarify.

1.When power on, there are default eth0~eth6 ports.

And when we connect eth1 with PC, and using command "ifconfig eth1 192.168.1.5 up" to set ip address.

PC cannot ping as well.

But if we set eth1 down first then set ip, as the command below, it will pin successfully.

ifconfig eth1 down

ifconfig eth1 192.168.1.5 up

And if we disconnect the cable and connect again, the same command need to be execute again then it will pin successfully again. This is very strange.

From the log below, it seems if set eth1 down first then up it again, icssg firmware will restart and it can work.

Is that normally?

root@am65xx-evm:~# ifconfig eth1 down
[ 86.865185] icssg-prueth icssg1-eth eth1: Link is Down
[ 86.889625] remoteproc remoteproc6: stopped remote processor b104000.rtu
[ 86.889651] remoteproc remoteproc5: stopped remote processor b134000.pru
root@am65xx-evm:~# [ 86.924087] net eth1: stopped
ifconfig eth1 192.168.1.5 up
[ 90.142909] remoteproc remoteproc5: powering up b134000.pru
[ 90.143196] remoteproc remoteproc5: Booting fw image ti-pruss/am65x-pru0-prueth-fw.elf, size 16992
[ 90.143246] remoteproc remoteproc5: remote processor b134000.pru is now up
[ 90.143278] remoteproc remoteproc6: powering up b104000.rtu
[ 90.143390] remoteproc remoteproc6: Booting fw image ti-pruss/am65x-rtu0-prueth-fw.elf, size 15588
[ 90.143426] remoteproc remoteproc6: remote processor b104000.rtu is now up
root@am65xx-evm:~# [ 90.200094] TI DP83867 b132400.mdio:00: attached PHY driver [TI DP83867] (mii_bus:phy_addr=b132400.mdio:00, irq=POLL)
[ 90.200352] net eth1: started
[ 93.270626] icssg-prueth icssg1-eth eth1: Link is Up - 1Gbps/Full - flow control off
[ 93.270794] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready

2. We want to use icssg ethernet port to run with EtherCAT protocol, but it always failed.

According to the link: https://www.ti.com/tool/PRU-ICSS-INDUSTRIAL-SW, it seems PRU ICSSG support EtherCAT on AM654x, but only SDK RTOS?

We want to know If icssg pru firmware support EtherCAT protocol on Linux SDK?

Thanks.

Eric

over 3 years ago

0 Nick Saulnier over 3 years ago

TI__Guru** 103460 points

Hello Eric,

Please take a look at the Ethernet Triage checklist: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/968230/faq-where-did-the-ethernet-triage-checklist-for-am3x-4x-5x-cpsw-wiki-go?

Please provide the outputs for ifconfig and ethtool that are discussed on that checklist. Provide those outputs for the non-working usecase.

Regards,

Nick

0 Eric Hsieh4 over 3 years ago in reply to Nick Saulnier

Expert 1300 points

Hi Nick Saulnier

1. I tried to test Ti EVM board again, and it looks fine. But it need about 1 min after set ip for eth port and PC can connect it. I'm not sure if it is expected. But it can work.

2. I do the same test on out EVM board again, but the EtherCAT protocol still cannot work. Attached the dmesg log and our dts setting.

In this test, we connect eth1 with PC and use eth2 as EtherCAT port. We use DP83822 and eth2 phy, it's different from Ti EVM.

And below are some info about eth2:

root@am65xx-evm:/home/3_5_17_10# ifconfig
docker0: flags=4099<UP,BROADCAST,MULTICAST> mtu 1500 metric 1
inet 172.17.0.1 netmask 255.255.0.0 broadcast 172.17.255.255
ether 02:42:ef:21:50:c3 txqueuelen 0 (Ethernet)
RX packets 0 bytes 0 (0.0 B)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 0 bytes 0 (0.0 B)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

eth0: flags=4099<UP,BROADCAST,MULTICAST> mtu 1500 metric 1
ether 40:2e:71:44:b0:88 txqueuelen 1000 (Ethernet)
RX packets 0 bytes 0 (0.0 B)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 0 bytes 0 (0.0 B)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

eth1: flags=4163<UP,BROADCAST,RUNNING,MULTICAST> mtu 1500 metric 1
inet 192.168.1.5 netmask 255.255.255.0 broadcast 192.168.1.255
inet6 fe80::d8f9:a8ff:fe4e:4624 prefixlen 64 scopeid 0x20<link>
ether da:f9:a8:4e:46:24 txqueuelen 1000 (Ethernet)
RX packets 26558 bytes 6629704 (6.3 MiB)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 25128 bytes 4393505 (4.1 MiB)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

eth2: flags=4419<UP,BROADCAST,RUNNING,PROMISC,MULTICAST> mtu 1500 metric 1
inet6 fe80::b029:8ff:fe66:51b8 prefixlen 64 scopeid 0x20<link>
ether b2:29:08:66:51:b8 txqueuelen 1000 (Ethernet)
RX packets 471 bytes 36250 (35.4 KiB)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 464 bytes 46150 (45.0 KiB)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

eth3: flags=4099<UP,BROADCAST,MULTICAST> mtu 1500 metric 1
ether ce:ce:bc:0e:67:4d txqueuelen 1000 (Ethernet)
RX packets 0 bytes 0 (0.0 B)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 0 bytes 0 (0.0 B)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

lo: flags=73<UP,LOOPBACK,RUNNING> mtu 65536 metric 1
inet 127.0.0.1 netmask 255.0.0.0
inet6 ::1 prefixlen 128 scopeid 0x10<host>
loop txqueuelen 1000 (Local Loopback)
RX packets 82 bytes 6220 (6.0 KiB)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 82 bytes 6220 (6.0 KiB)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

root@am65xx-evm:/home/3_5_17_10# ethtool eth2
Settings for eth2:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Full
100baseT/Full
Supported pause frame use: No
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Full
100baseT/Full
Advertised pause frame use: No
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
Link partner advertised pause frame use: No
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 100Mb/s
Duplex: Full
Auto-negotiation: on
Port: Twisted Pair
PHYAD: 7
Transceiver: external
MDI-X: Unknown
Current message level: 0x00007fff (32767)
drv probe link timer ifdown ifup rx_err tx_err tx_queued intr tx_done rx_status pktdata hw wol
Link detected: yes
root@am65xx-evm:/home/3_5_17_10# ethtool -S eth2
NIC statistics:
rx_good_frames: 304
rx_broadcast_frames: 319
rx_multicast_frames: 319
rx_crc_error_frames: 48
rx_mii_error_frames: 0
rx_odd_nibble_frames: 0
rx_frame_max_size: 2000
rx_max_size_error_frames: 0
rx_frame_min_size: 64
rx_min_size_error_frames: 48
rx_overrun_frames: 0
rx_class0_hits: 352
rx_class1_hits: 0
rx_class2_hits: 0
rx_class3_hits: 0
rx_class4_hits: 0
rx_class5_hits: 0
rx_class6_hits: 0
rx_class7_hits: 0
rx_class8_hits: 352
rx_class9_hits: 352
rx_class10_hits: 0
rx_class11_hits: 0
rx_class12_hits: 0
rx_class13_hits: 0
rx_class14_hits: 0
rx_class15_hits: 0
rx_smd_frags: 0
rx_bucket1_size: 64
rx_bucket2_size: 128
rx_bucket3_size: 256
rx_bucket4_size: 512
rx_64B_frames: 0
rx_bucket1_frames: 48
rx_bucket2_frames: 304
rx_bucket3_frames: 0
rx_bucket4_frames: 0
rx_bucket5_frames: 0
rx_total_bytes: 21257
rx_tx_total_bytes: 53553
tx_good_frames: 352
tx_broadcast_frames: 319
tx_multicast_frames: 352
tx_odd_nibble_frames: 0
tx_underflow_errors: 0
tx_frame_max_size: 2000
tx_max_size_error_frames: 0
tx_frame_min_size: 64
tx_min_size_error_frames: 0
tx_bucket1_size: 64
tx_bucket2_size: 128
tx_bucket3_size: 256
tx_bucket4_size: 512
tx_64B_frames: 0
tx_bucket1_frames: 0
tx_bucket2_frames: 329
tx_bucket3_frames: 8
tx_bucket4_frames: 15
tx_bucket5_frames: 0
tx_total_bytes: 32296

8_2_0.txt

Fullscreen k3-am654-base-board_08_02.txt Download

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible =  "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &icssg1_emac0;
		ethernet2 = &icssg1_emac1; //EtherCAT port 1
		ethernet3 = &icssg2_emac0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";

		/* 1G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure-ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00200000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	eeprom_gpio: eeprom_gpio {
		compatible = "eeprom-gpio";
		eeprom-gpio = <&wkup_gpio0 7 GPIO_ACTIVE_HIGH>;
	};

	clk_ov5640_fixed: fixed-clock-ov5640 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&ledgpio0_pins_default &ledgpio1_pins_default &ledgpio2_pins_default>;

		compatible = "gpio-leds";

		led1 {
			label = "LED-RUN";
			gpios = <&main_gpio0 27 GPIO_ACTIVE_LOW>;
		};

		led2 {
			label = "LED-ERR";
			gpios = <&main_gpio1 70 GPIO_ACTIVE_HIGH>;
		};

		led3 {
			label = "LED-BUS";
			gpios = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
		};

		led4 {
			label = "LED-232TX";
			gpios = <&main_gpio1 21 GPIO_ACTIVE_HIGH>;
		};

		led5 {
			label = "LED-232RX";
			gpios = <&main_gpio1 45 GPIO_ACTIVE_HIGH>;
		};

		led6 {
			label = "LED-485TX";
			gpios = <&main_gpio1 87 GPIO_ACTIVE_HIGH>;
		};

		led7 {
			label = "LED-485RX";
			gpios = <&main_gpio1 46 GPIO_ACTIVE_HIGH>;
		};

		led8 {
			label = "LED-SD";
			gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
		};
	};

#if 1
    /* Dual Ethernet application node on PRU-ICSSG1 */
		icssg1_eth: icssg1-eth {
			compatible = "ti,am654-icssg-prueth";
			pinctrl-names = "default";
		    pinctrl-0 = <&icssg1_rgmii_pins_default>;
			sram = <&msmc_ram>;
			ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
			firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
					"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
					"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
					"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
					"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
					"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

			ti,pruss-gp-mux-sel = <2>,	/* MII mode */
					      <2>,
					      <2>,
					      <2>,	/* MII mode */
					      <2>,
					      <2>;

			mii-g-rt = <&icssg1_mii_g_rt>;
			mii-rt = <&icssg1_mii_rt>;
			iep = <&icssg1_iep0>,  <&icssg1_iep1>;

			interrupt-parent = <&icssg1_intc>;
			interrupts = <24 0 2>, <25 1 3>;

			interrupt-names = "tx_ts0", "tx_ts1";

			dmas = <&main_udmap 0xc200>, /* egress slice 0 */
			       <&main_udmap 0xc201>, /* egress slice 0 */
			       <&main_udmap 0xc202>, /* egress slice 0 */
			       <&main_udmap 0xc203>, /* egress slice 0 */
			       <&main_udmap 0xc204>, /* egress slice 1 */
			       <&main_udmap 0xc205>, /* egress slice 1 */
			       <&main_udmap 0xc206>, /* egress slice 1 */
			       <&main_udmap 0xc207>, /* egress slice 1 */

			       <&main_udmap 0x4200>, /* ingress slice 0 */
			       <&main_udmap 0x4201>, /* ingress slice 1 */
			       <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
			       <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
			dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
				    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
				    "rx0", "rx1",
				    "rxmgm0", "rxmgm1";

			icssg1_emac0: ethernet-mii0 {
				phy-handle = <&icssg1_phy0>;
				phy-mode = "rgmii-rxid";
				syscon-rgmii-delay = <&scm_conf 0x4110>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
                //ti,half-duplex-capable;
			};
#if 1
            icssg1_emac1: ethernet-mii1 {
				phy-handle = <&icssg1_phy1>;
				phy-mode = "rgmii-rxid";
				syscon-rgmii-delay = <&scm_conf 0x4114>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
                //ti,half-duplex-capable;
			};
#endif
		};
#if 1
	/* Single Ethernet application node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&icssg2_rgmii_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		mii-g-rt = <&icssg2_mii_g_rt>;
		mii-rt = <&icssg2_mii_rt>;
		iep = <&icssg2_iep0>,  <&icssg2_iep1>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
			    "rxmgm0", "rxmgm1";

		icssg2_emac0: ethernet-mii0 {
			phy-handle = <&icssg2_phy2>;
			phy-mode = "rgmii-rxid";
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};
	};
#endif
#endif

};

&wkup_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&eepromgpio_pins_default &iovolctrl_pins_default &i2c0switch_pins_default>;

	phy2ax58100_pins_default: phy2ax58100_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_INPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
		>;
	};

	mcan0_pins_default: mcan0_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT, 0) /* (W2) MCU_MCAN0_RX */
			AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (W1) MCU_MCAN0_TX */
		>;
	};

	phy2ax58100_mdio2_pins_default: phy2ax58100_mdio2_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	eepromgpio_pins_default: eepromgpio_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00cc, PIN_INPUT, 7) /* (AC1) WKUP_GPIO0_7 */
		>;
	};

	iovolctrl_pins_default: iovolctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6 */
		>;
	};

	i2c0switch_pins_default: i2c0switch_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00D8, PIN_OUTPUT, 7) /* (AB3) WKUP_GPIO0_10 */
		>;
	};
};

&main_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default>;

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7)  /* (AG11) GPIO1_27 */ /*Latch*/
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7)   /* (AD11) GPIO1_28 */ /*/DO-FAULT*/
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1)   /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1)   /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1)   /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1)   /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1)   /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1)   /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1)   /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1)   /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7)   /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7)   /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7)   /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7)   /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7)   /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7)   /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7)   /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7)   /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			AM65X_IOPAD(0x0244, PIN_OUTPUT_PULLDOWN, 7) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */ /*****************************************************************************/
			AM65X_IOPAD(0x0248, PIN_OUTPUT_PULLDOWN, 7) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */ /*We set the mode as 7 due to PRU cannot control default status of output pin*/
			AM65X_IOPAD(0x024c, PIN_OUTPUT_PULLDOWN, 7) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */ /*And we set the mode back to 0 using memdev2 after PRU init*/
			AM65X_IOPAD(0x0250, PIN_OUTPUT_PULLDOWN, 7) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */ /*****************************************************************************/
			AM65X_IOPAD(0x0254, PIN_INPUT, 1)   /* (AA25) PRG0_PRU1_GPI4.GPIO1_53 */ /*HS_PRU0_LV*/
			AM65X_IOPAD(0x0258, PIN_OUTPUT_PULLDOWN, 7) /* (U23) PRG0_PRU1_GPI4.GPIO1_54 */ /*HS_PRU0_IRQ*/
			AM65X_IOPAD(0x0284, PIN_INPUT, 7)   /* (AC24) PRG0_PRU1_GPO16.GPIO1_65 */
			AM65X_IOPAD(0x028c, PIN_INPUT, 7)   /* (Y26) PRG0_PRU1_GPO18.GPIO1_67 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7)   /* (W26) PRG0_PRU1_GPO19.GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7)   /* (AE26) PRG0_MDIO0_MDIO.GPIO1_69 */
			AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) GPIO1_20 */ /*SEL-OUT*/
		>;
	};

	ledgpio1_pins_default: ledgpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7)  /* (AG12) GPIO1_21 */ /* RS232-TX-LED */
			AM65X_IOPAD(0x0234, PIN_OUTPUT, 7)  /* (AD28) GPIO1_45 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0238, PIN_OUTPUT, 7)  /* (U26) GPIO1_46 */ /* RS485-RX-LED */
			AM65X_IOPAD(0x023c, PIN_OUTPUT, 7)  /* (V25) GPIO1_47 */ /* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0240, PIN_OUTPUT, 7)  /* (U24) GPIO1_48 */ /* BUSFAULT-LED */
			AM65X_IOPAD(0x0298, PIN_OUTPUT, 7)  /* (AE28) GPIO1_70 */ /* ERROR-LED */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7)  /* (R28) GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7)   /* (R26) GPIO0_22 */ /*RUN/STOP SW*/
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7)  /* (T25) GPIO0_24 */ /*/AX58100-RST*/
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7)  /* (T24) GPIO0_25 */ /*/AX58100-PYH-RST*/
			AM65X_IOPAD(0x0068, PIN_OUTPUT, 7)  /* (R24) GPIO0_26 */ /*CAN-TERM*/
			AM65X_IOPAD(0x0070, PIN_OUTPUT, 7)  /* (R25) GPIO0_28 */ /*GPIO-eMMC-RST*/
			AM65X_IOPAD(0x0074, PIN_INPUT, 7)   /* (T27) GPIO0_29 */ /*/24V-LV*/
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1)   /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1)   /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1)   /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1)   /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x00d8, PIN_INPUT, 1)   /* (AD14) PRG2_PRU1_GPO16.GPIO0_55 */ /*HS_PRU2_LV*/
			AM65X_IOPAD(0x00f4, PIN_INPUT, 7)   /* (AF27) GPIO0_61 */ /*PRU-IRQ*/
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7)  /* (AH25) GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7)  /* (AH26) GPIO0_73 */ /*ECAT2-PHY-RST*/
		>;
	};

	ledgpio0_pins_default: ledgpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPIO0_27 */ /* RUN-LED */
		>;
	};

#if 0
	mygpmc3_pins_default: mygpmc3_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00bc, PIN_OUTPUT, 3) /* (AG14) PRG2_PRU1_GPO4.GPMC0_A8 */
			AM65X_IOPAD(0x00c0, PIN_OUTPUT, 3) /* (AG15) PRG2_PRU1_GPO5.GPMC0_A7 */
			AM65X_IOPAD(0x00c4, PIN_OUTPUT, 3) /* (AC17) PRG2_PRU1_GPO6.GPMC0_A6 */
			AM65X_IOPAD(0x00cc, PIN_OUTPUT, 3) /* (AD15) PRG2_PRU1_GPO8.GPMC0_A4 */
			AM65X_IOPAD(0x00d0, PIN_OUTPUT, 3) /* (AF14) PRG2_PRU1_GPO9.GPMC0_A3 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 3) /* (AC15) PRG2_PRU1_GPO10.GPMC0_A2 */
			AM65X_IOPAD(0x00d8, PIN_OUTPUT, 3) /* (AD14) PRG2_PRU1_GPO11.GPMC0_A1 */
			AM65X_IOPAD(0x003c, PIN_INPUT, 0) /* (R27) GPMC0_AD15 */
			AM65X_IOPAD(0x0038, PIN_INPUT, 0) /* (P24) GPMC0_AD14 */
			AM65X_IOPAD(0x0034, PIN_INPUT, 0) /* (N25) GPMC0_AD13 */
			AM65X_IOPAD(0x0030, PIN_INPUT, 0) /* (N26) GPMC0_AD12 */
			AM65X_IOPAD(0x002c, PIN_INPUT, 0) /* (P27) GPMC0_AD11 */
			AM65X_IOPAD(0x0028, PIN_INPUT, 0) /* (P28) GPMC0_AD10 */
			AM65X_IOPAD(0x0024, PIN_INPUT, 0) /* (M26) GPMC0_AD9 */
			AM65X_IOPAD(0x0020, PIN_INPUT, 0) /* (N23) GPMC0_AD8 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 0) /* (M25) GPMC0_AD7 */
			AM65X_IOPAD(0x0018, PIN_INPUT, 0) /* (N28) GPMC0_AD6 */
			AM65X_IOPAD(0x0014, PIN_INPUT, 0) /* (N27) GPMC0_AD5 */
			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) GPMC0_AD4 */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (M24) GPMC0_AD3 */
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (M28) GPMC0_AD2 */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (M23) GPMC0_AD1 */
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (M27) GPMC0_AD0 */
			AM65X_IOPAD(0x0054, PIN_OUTPUT, 0) /* (P23) GPMC0_BE1n */
			AM65X_IOPAD(0x0048, PIN_OUTPUT, 0) /* (P26) GPMC0_OEn_REn */
			AM65X_IOPAD(0x004c, PIN_OUTPUT, 0) /* (U28) GPMC0_WEn */
		>;
	};
#endif

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	icssg1_rgmii_pins_default: icssg1_rgmii_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	icssg2_mdio_pins_default: icssg2_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	icssg2_rgmii_pins_default: icssg2-rgmii-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_OUTPUT, 0)  /* (AH13) GPIO1_17 */ /*SPI0-CLK*/
			AM65X_IOPAD(0x01c8, PIN_OUTPUT, 0)  /* (AE13) GPIO1_18 */ /*SPI0_D0*/
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0)   /* (AD13) GPIO1_19 */ /*SPI0_D1*/
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0)  /* (AG13) GPIO1_15 */ /*SPI0_CS0*/
			AM65X_IOPAD(0x01c0, PIN_OUTPUT, 0)  /* (AF13) GPIO1_16 */ /*SPI0_CS1*/
		>;
	};

	myspi2_pins_default: myspi2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d8, PIN_OUTPUT, 0)  /* (AH12) GPIO1_22 */ /*SPI1_CLK*/
			AM65X_IOPAD(0x01dc, PIN_OUTPUT, 0)  /* (AE12) GPIO1_23 */ /*SPI1_D0*/
			AM65X_IOPAD(0x01e0, PIN_INPUT, 0)   /* (AF12) GPIO1_24 */ /*SPI1_D1*/
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)   /* (AF11) GPIO1_25 */ /*UART0_RXD*/
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)  /* (AE11) GPIO1_26 */ /*UART0_TXD*/
		>;
	};

	rs232_pins_default: rs232_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0288, PIN_INPUT, 6)   /* (Y27) GPIO1_66 */ /*RS232-RXD*/
			AM65X_IOPAD(0x0260, PIN_OUTPUT, 6)  /* (W28) GPIO1_56 */ /*RS232-TXD*/
		>;
	};

	rs485_pins_default: rs485_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0174, PIN_INPUT, 6)   /* (AE23) GPIO0_93 */ /*RS485-RXD*/
			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) GPIO0_83 */ /*RS485-TXD*/
			AM65X_IOPAD(0x017c, PIN_OUTPUT_PULLDOWN, 7) /* (AC21) GPIO0_95 */ /*RS485-DIR*/
		>;
	};

	usb0_pins_default: usb0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) GPIO1_71 */ /*USB0_DRVVBUS*/
		>;
	};

	usb20_host_pins_default: usb20_host_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) GPIO1_72 */ /*USB1_DRVVBUS*/
		>;
	};
};

&main_pmx1 {
	pinctrl-names = "default";
        pinctrl-0 = <&gpio2_pins_default>;

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
		>;
	};

	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_OUTPUT, 7)  /* (D21) GPIO1_86 */ /* SER-COMM-EN */
			AM65X_IOPAD(0x0018, PIN_INPUT, 7)   /* (B22) GPIO1_88 */ /* DDR-TP0 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 7)   /* (C23) GPIO1_89 */ /* DDR-TP1 */
		>;
	};

	ledgpio2_pins_default: ledgpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) GPIO1_87 */	/* RS485-TX-LED */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

//Eric+{
&main_uart2 {
	pinctrl-names = "default";
	power-domains = <&k3_pds 148 TI_SCI_PD_SHARED>;
	pinctrl-0 = <&rs232_pins_default>;
	status = "okay";
};

&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&rs485_pins_default>;
	power-domains = <&k3_pds 147 TI_SCI_PD_SHARED>;
	rts-gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <0 0>;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};
//Eric+}

&main_i2c0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <100000>;

	eeprom: eeprom@50 {
		compatible = "atmel,24c16";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&main_i2c1 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <100000>;

	s35390a:rtc@30{
		compatible = "sii,s35390a";
		reg = <0x30>;
	};
};

&main_spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <48000000>;
		#address-cells = <1>;
		#size-cells= <1>;
	};
};

&main_spi1 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myspi2_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        gpio-controller;
        #gpio-cells = <2>;
        reg = <0>;
        registers-number = <2>;
        registers-default = /bits/ 8 <0xb7>;
        spi-max-frequency = <100000>;
    };
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

/*
 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 * SD card interface might fail. Boards with sr1.0 are recommended to
 * disable sdhci1
 */
&sdhci1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&dwc3_1 {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb20_host_pins_default>;
	dr_mode = "host";
};

&dwc3_0 {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

//Eric+{

&m_can0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcan0_pins_default>;
	//stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&usb0 {
	pinctrl-names = "default";
	//pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "peripheral";
};
//Eric+}

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

&pcie0_rc {
	status = "disabled";
};

&pcie0_ep {
	status = "disabled";
};

&pcie1_rc {
	status = "disabled";
};

&pcie1_ep {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "disabled";
};

&mailbox0_cluster3 {
	status = "disabled";
};

&mailbox0_cluster4 {
	status = "disabled";
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	//Eric- pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
	pinctrl-0 = <&phy2ax58100_pins_default &phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
	reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   /* PHY datasheet states 1us min */

	phy0: ethernet-phy@3 {
		reg = <3>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	phy-handle = <&phy0>;
};

#if 1
&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	//reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	//reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
        //reset-assert-us = <1000>;
        //reset-deassert-us = <1000>;
        //reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
#if 1
    icssg1_phy1: ethernet-phy@7 {
		reg = <7>;
	};
#endif
};

#if 1
&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;

	//reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	//reset-delay-us = <2>;
	icssg2_phy2: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};
#endif
#endif

3. When I check the log attached, I found there are some logs like this : "unsupported resource 5".

It seems not happened on Ti EVM board. Is that related to this?

Thanks.

Eric

0 Eric Hsieh4 over 3 years ago in reply to Eric Hsieh4

Expert 1300 points

Hi Nick Saulnier

Could you help check this? Thanks

Eric

0 Nick Saulnier over 3 years ago in reply to Eric Hsieh4

TI__Guru** 103460 points

Hello Eric,

Apologies for the delayed response. I am sending your question to another team member.

Regards,

Nick

0 Pekka Varis over 3 years ago in reply to Nick Saulnier

TI__Mastermind 27050 points

Eric Hsieh4 said:
2. We want to use icssg ethernet port to run with EtherCAT protocol, but it always failed.

According to the link: https://www.ti.com/tool/PRU-ICSS-INDUSTRIAL-SW, it seems PRU ICSSG support EtherCAT on AM654x, but only SDK RTOS?

We want to know If icssg pru firmware support EtherCAT protocol on Linux SDK?

Eric Hsieh4 said:
In this test, we connect eth1 with PC and use eth2 as EtherCAT port. We use DP83822 and eth2 phy, it's different from Ti EVM

EtherCAT slave consumes entire ICSS subsystem, two Ethernet ports. And we only support it from RTOS. Can you clarify the topology you are trying to do? eth0 is connected to CPSW2g Ethernet, eth1 and eth2 to ICSSG. EtherCAT master is just a MAC but I'm assuming you are talking about a slave. Some configurations changes require both eth ports per ICSS (e.g. eth1 and eth2) to be down.

Eric Hsieh4 said:
And when we connect eth1 with PC, and using command "ifconfig eth1 192.168.1.5 up" to set ip address.

PC cannot ping as well.

But if we set eth1 down first then set ip, as the command below, it will pin successfully.

ifconfig eth1 down

ifconfig eth1 192.168.1.5 up

And if we disconnect the cable and connect again, the same command need to be execute again then it will pin successfully again. This is very strange.

From the log below, it seems if set eth1 down first then up it again, icssg firmware will restart and it can work.

I don't see this issue with my AM65x board and eth1 or eth2. I normally run DHCP (dhcp server on PC) to give the IP addresses, but I tried and static looks to work as well. What is the LAN topology between your PC and the AM65x board? Direct connection, or is there a switch? Have you tried ping in both directions?

In general I'd recommend using the ip command instead of ifconfig:

ip addr add 192.168.1.5/24 dev eth1
ip link set dev eth1 up

Regardless you did not set the subnet mask with the ifconfig (the "/24" in my example), does your PC have multiple network cards? If so I would suggest to do that and have the PC configured so 192.168.1.xxx subnet traffic goes to the interface connected to the EVM.

Pekka

0 Eric Hsieh4 over 3 years ago in reply to Pekka Varis

Expert 1300 points

Hi Pekka Varis

Let's discuss EtherCAT first.

From the test log we run with etherCAT application, I found ethernet runs with "Promiscous Mode". And SDK8 document did talk about this.

According to my experiment results between SDK7 and SDK8,

SDK7: Ti SR1 EVM and my customer SR2 EVM both work fine.

SDK8: Ti SR1 EVM woks fine, but my customer SR2 EVM didn't.

Both SDK version on Ti EVM works fine, so I think EtherCAT should also working on Linux SDK.

The difference between SDK8 test result is CPU version. I believe PRU firmware also have something different when runs with different CPU version.

Please check again about this.

From the log from customer EVM, we got a message like this.

[ 20.062016] remoteproc remoteproc7: powering up b134000.pru
[ 20.062229] remoteproc remoteproc7: Booting fw image ti-pruss/am65x-sr2-pru0-prueth-fw.elf, size 37264
[ 20.062255] remoteproc remoteproc7: unsupported resource 5
[ 20.062282] remoteproc remoteproc7: remote processor b134000.pru is now up
[ 20.062312] remoteproc remoteproc8: powering up b104000.rtu
[ 20.062455] remoteproc remoteproc8: Booting fw image ti-pruss/am65x-sr2-rtu0-prueth-fw.elf, size 30832
[ 20.062484] remoteproc remoteproc8: remote processor b104000.rtu is now up
[ 20.062506] remoteproc remoteproc9: powering up b10a000.txpru
[ 20.062613] remoteproc remoteproc9: Booting fw image ti-pruss/am65x-sr2-txpru0-prueth-fw.elf, size 36656
[ 20.062648] remoteproc remoteproc9: remote processor b10a000.txpru is now up

Could you also help to check what this meaning?

Thanks.

Eric

0 Pekka Varis over 3 years ago in reply to Eric Hsieh4

TI__Mastermind 27050 points

Eric Hsieh4 said:
Let's discuss EtherCAT first.

Are you running EtherCAT master or slave? What stack are you using? EtherCAT master yes, you can run in Linux (such as Codesys) or RTOS (such as Acontis), or something else. TI does not provide a stack.

EtherCAT slave requires non-IEEE on-the-fly switching and some other unique and patented functionality. On Sitara this means using EtherCAT specific firmware on ICSS. For AM65x this is from https://software-dl.ti.com/processor-industrial-sw/esd/PRU-ICSS-ETHERCAT-SLAVE/latest/index_FDS.html .

Pekka

0 Eric Hsieh4 over 3 years ago in reply to Pekka Varis

Expert 1300 points

Hi Pekka Varis,

Yes, we are running Codesys EtherCAT master on our board with Linux.

Because we only have Ti SR1 EVM board to verify, I'm not sure if it works on SR2 EVM board.

So,

1. Please help to check if Ti SR2 EVM works or not and clarify if it's related to CPU or icssg firmware version.

2. Please let us know what's the log "remoteproc remoteproc7: unsupported resource 5" means?

Eric

0 Pekka Varis over 3 years ago in reply to Eric Hsieh4

TI__Mastermind 27050 points

So this is just evaluation boards and a test setup. On the EVM can you use eth0 (CPSW2g) for Codesys? There is no advantage to run Codesys on ICSSG based Ethernet port. Codesys uses standard Ethernet features, including Promiscous mode to detect what is on the network. This is not EtherCAT specific.

Eric Hsieh4 said:
I believe PRU firmware also have something different when runs with different CPU version

In general I'd not use SR1.0 for any stability related issues, especially with ICSSG/PRU. The SR1 ICSSG Ethernet and PRU firmware is different from SR2. We don't support SR1.0 for production, to reduce permutations of possible issues use only SR2 EVMs.

Eric Hsieh4 said:
[ 20.062255] remoteproc remoteproc7: unsupported resource 5

I suspect this might be some mismatch between what the PRU code is trying to access and what is available, maybe pin-mux or sysfw version. To proceed is this SDK 8.2 default image with Codesys installed on top or what SW is running on the SR2 board that prints this out?

Pekka

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AM6548: ICSSG ethernet port lunch on SDK8_02