AM6548: 10M and 100M half duplex cannot link as well

Hello Eric,

You are using AM65x SR2.0, right? (PRU_ICSSG has TX_PRU cores in addition to the PRU and RTU cores)

The patch explicitly discusses MII, but does not mention RGMII. Let me check to see if both connection types support half duplex with this code, or if this code only enables half duplex for MII.

Please ping the thread if I have not responded by early next week.

Regards,

Nick

Hi Nick Saulnier,

Yes, we are using AM65 SR2.0.

Eric

Hi Nick Saulnier,

The goal is we want 10M and 100M half duplex can work well with icssg port on SDK7.

I have tested on SDK8, and 10M half duplex seems still an issue, but we need 100M at least.

Please help to see if any patch can provided.

Also, please also check if it's related to icssg firmware.

Thanks.

Eric

Hi Nick Saulnier,

Is there any update about this?

Thanks.

Eric

Hi Nick Saulnier,

Did you find any info to share?

Thanks.

Eric

Hello Eric,

Apologies for the delayed response. I am sending your thread to another team member.

Regards,

Nick

AM65x and SDK 7.x, the ICSSG does not support half duplex at any speed. https://software-dl.ti.com/processor-sdk-linux-rt/esd/AM65X/07_03_00_08/exports/docs/linux/Foundational_Components/PRU-ICSSG/Linux_Drivers/PRU_ICSSG_Ethernet.html#features-supported 

SDK 8.x added this support. https://software-dl.ti.com/processor-sdk-linux-rt/esd/AM65X/08_02_00_01/exports/docs/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.html#features-supported .

So it is clear you need to use the ICSSG firmware and drivers from 8.x to support half-duplex, the ones in earlier 7.x releases won't support half-duplex.

I did also notice this https://software-dl.ti.com/processor-sdk-linux-rt/esd/AM65X/08_02_00_01/exports/docs/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet.html#m-10m-half-duplex . I'm checking on what this means with RGMII and the DP83867 (datasheet says COL is not used with RGMII mode). But regardless I think this device tree entry will need something:

&main_pmx0 {
...

   icssg0_rgmii_pins_default: icssg0-rgmii-pins-default {
         pinctrl-single,pins = <
         ...
                AM65X_IOPAD(0x026c, PIN_INPUT, 1) /* (AA28) PRG0_PRU1_GPO10.PRG0_PRU1_GPI10 - col */
         >;
   };
};

  Pekka

Hi Pekka Varis,

1.) 

I tried to find out the info about COL signal in DP83867.

From DP83867IR spec, it told COL not used with RGMII mode.

But from DP83867e, no such info about this. And we are using DP83867e with RGMII.

Please help to check if COL is needed.

2.)

From the link you provide, it told "The 10/100 half duplex (HD) support depends on HW capability to route PHY output pin (COL) to ICSSG GPI1O pin (PRGx_PRU0/1_GPI10) as input."

But from the gpio info, the GPI10 mode conflicts with RGMII_TD2 mode.

I doubt if this can work.

Or how to make this configuration in dts file?

Thanks.

Eric

Eric Hsieh4 said:

I tried to find out the info about COL signal in DP83867.

From DP83867IR spec, it told COL not used with RGMII mode.

But from DP83867e, no such info about this. And we are using DP83867e with RGMII.

Please help to check if COL is needed.

I posted https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1126804/dp83867e-is-10m-half-duplex-supported-with-rgmii . I suspect DP83867e with RGMII does not support 10M half-duplex.

Eric Hsieh4 said:

From the link you provide, it told "The 10/100 half duplex (HD) support depends on HW capability to route PHY output pin (COL) to ICSSG GPI1O pin (PRGx_PRU0/1_GPI10) as input."

But from the gpio info, the GPI10 mode conflicts with RGMII_TD2 mode.

I doubt if this can work.

I agree. Based on the pin-mux options, only ICSSG0 (PRG0_PRU1_GPO10 pad) and ICSSG1 (PRG1_PRU1_GPO10 pad) look like allow this pin to be available in parallel with RGMII on AM65x. Which to me means ICSSG2 (PRG2 pads) cannot support COL or COLLISION DETECT signal.

Can you use ICSSG0 (PRG0) or ICSSG1 (PRG1)?

  Pekka

Hi Pekka Varis,

1.)

From the answer of thread you post, so DP83867e support 10/100M half-duplex without COL pin, right?

2.)

If 1 is right, this problem "the GPI10 mode conflicts with RGMII_TD2 mode" is not existed.

Eric