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Few questions on C5515 FDK demo code

Hello,

 

I have a few questions regarding the FDK and C5515: I am working with the demo application provided by TI.I need to store features of the fingerprint on PC. In order to acomplish that I would like to configure UART in a write (yes I know about CSL but yet.....). The following are my questionsIs :

  1.  In CCS I saw that the CLKSELSTAT is 1 which means that FDK is running from external 12MHz clock. Am I write? (It is not described anywhere)
  2. In the function: TA_hal_Init_high_clk, after the SYS_CLKCFGMSW = 0x1; (last line) the SYSCLKSEL bit remains to be 0 (at least in CCS register view). Can you explain why is that? What is the intention of hte function if not to move to 120 MHz PLL

Those questions arise from the fact that in order to configure UART I need to configure in a correct way UART CLK which depends on SYSCLK (Yes I know about CSL BUT .. :-))

 

Will appreciate a quick answer.

Regards

  • Hi Igor,

      The Core board schematic indicates the presence of Test Point TP1 through TP5. Please check the Clock on TP1(CLKOUT) to confirm the actual clock rate in your code.

    Test Point TP1 and TP2 indicate the current set Clock rates(CLKOUT and RTCCLKOUT).0383.TMDXBDKFP5515 Core Board.pdf

    One thing we have noted is that there are 2 Core board revisions. --- one with 14 and 12 Pin Connector and another design with 8pinX2 Connectors.  Both Core boards feature the test points. Please check the appropriate schematic for your core board.

    The same document indicates 2 Crystals at 32.768Mhz-Y2(sic!) and 12Mhz-Y1, so the purpose of TA_hal_Init_high_clk is just to switch to a higher clock rate. TA_Capture is supposed to switch to a lower rate later after image capture.

    From Section of the C5515:

    4.3.1 Clock Configurations After Device Reset
    After reset, the on-chip Bootloader programs the system clock generator based on the input clock selected
    via the CLK_SEL pin. If CLK_SEL = 0, the Bootloader programs the system clock generator and sets the
    system clock to 12.288 MHz (multiply the 32.768-kHz RTC oscillator clock by 375). If CLK_SEL = 1, the
    Bootloader bypasses the system clock generator altogether and the system clock is driven by the CLKIN
    pin. In this case, the CLKIN frequency is expected to be 11.2896 MHz, 12.0 MHz, or 12.288 MHz
    . While
    the bootloader tries to boot from the USB , the clock generator will be programmed to output
    approximately 36 MHz.

    Спасибо и отношения

    Vikram.

  • Hello Vikram,

     

    Thanks a lot for advice.

    One more thing that I would like to ask is:

    While debugging through the code composer and using XDS510USB, I get to the following situation:

     

    The CSL function writes to some register. In the registers window of CCS (version 4.2.3) I do not see any update, while if I add a debug SW that reads back the register, I do update.

    Can it be that CCS does not suport C5515 or shall change any of my settings?I followed user guide for configuring CCS provided on DVD (there I set teh target to EV5505)

    Can u please explain the behavior?

     

    Igor

  • Hi Igor,

      Am using the FTDI based debugger and have not been able to debug.. not using XDS510USB. Please check with Spectrum Digital regards this issue since the CCS4 generally uses Eclipse/Standard TI debug symbols as defined in target configuration.

    Could you please recheck your Target Configuration (using  C5515)?.  

    Also C5515 has specific Memory addresses that you could read(just make sure the values declared are as volatile/register) to get the current value.

    HTH,

    regards,

    Vikram.

     

  • Hello Vikram,

     

    thanks a lot for your help!!!

    Currently I have tried to define both EVM5515 and EVM5505 in target file but anyway CCS is not showing correct register fields...This is a minor problem since I can read register and then look on the variable.

    I have connected to TP1 and TP2 and see very strange things there: on TP1 I see the clock that is running from 24 to 131 MHz which is very strange since its duty cycle is incorrect (it is not 50 %). I am afraid I am missing something... Any suggestions?Which clock do u see?

    Regards,

    Igor

  • Could you please give me a little description about your "store features of the fingerprint on PC"? I put some parts of FDK_demo code into the CSL_ usb_poll_example Project.What I want to do is store features on PC using mini-USB.But it stoped at function "TA_hal_gpio_read_cmos_image" when I run the program.