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DRA829J: How to generate PCIe Reset?

Part Number: DRA829J
Other Parts Discussed in Thread: DRA829

If the device's PCIe ports are being used in host mode, what is your suggested methodology to generate a PCIe bus reset signal?.

Looking at the EVM (Jacinto 7 common base board) schematics, it appears that the PCIe reset is generated from an I2C GPIO device?

thanks