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Original question:

AM6548: DDR Mode register Read/Write

TDA4VM-Q1: How to turn off DDR4 periodic training

Gaston yan
Intellectual 545 points
Part Number: TDA4VM-Q1

Dear expert : 

                   I using RTOS SDK 7.3 and evm board.

                   We are asking Micron to assist in a DDR eye diagram test. Micron's reply is that we have not turned off DDR periodic training. How can I turn off DDR periodic training in sbl？

                   

  • 0
    Prodigy 140 points

    Dear TI teams

    as above Gaston searching for support from TI about how to turn off the DDR DQ trainning, I would like to  replenish more background information for this case:

    We are trying to test the LPDDR4 signal quality supported from Micron suppiler,While we found the DQ trainning do not turned off during test the eye pattern, Is there any tips can share how we can turn off the DQ trainning,

    It is very urgent for us as we need to turn off these training and update the software so that we can continue to perform the DDR signal test.

    Thanks a lot and please reply internal priority! 

  • 0 in reply to Perry Wang
    TI__Mastermind 38600 points

    Hi Gaston and Perry,

    You can clear DDRSS_PI_71[15:0] (parameter PI_WDQLVL_INTERVAL) to 0x0 to turn off interval write DQ training. 

    Note that while you may do this for the DDR signal test, turning off interval write DQ training is not a supported final solution and must be left on in production software.

    Regards,
    Kevin