TDA4VM: CSI-RX clock resistor calibration problem

Hi Herry Huang,

When you see this issue, can you please get the the performance statistics/capture statistics and share them? I want to check if there was any error reported in the CSIRX module. 

Also can you please resetting CSIRX module, as i suggested on below link?

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1092960/tda4vm-the-ecc-and-crc-errors-cause-the-csirx-driver-can-not-receive-the-image/4055357#4055357

Regards,

Brijesh

Hi  Brijesh

      I got the register , big different is I_RES_CALIB_CODE in 0x458 00F8.

     If everything is ok, 0x45800F8  -->  0x00000025, and waveform is below:

    If could not work, , 0x45800F8  -->  0x0000000D, and waveform is below:, i think that is wrong in red frame.

     So how can we adjust the calibration teminator.

Hi  Brijesh

     I lanuch the multi_cam program on board first time , not exit and lanuch, so not my case.

     Below is performance statistics:

     When it work:

           CPU: mcu2_0: TOTAL LOAD =  29.22 % ( HWI =  28. 8 %, SWI =   0.19 % )

           CPU: mcu2_0: TASK:       TIVX_CAPT1:   0. 5 %

           CPU: mcu2_0: TASK:       TIVX_DISP1:   0. 2 %

           GRAPH: app_multi_cam_graph (#nodes = 2, #executions = 10)
               NODE: CAPTURE1: capture_node: avg = 256945 usecs, min/max = 71 / 1745968 usecs, #executions = 10
               NODE: DISPLAY1: DisplayNode: avg = 304704 usecs, min/max = 49468 / 839818 usecs, #executions = 10

      But not work:

          CPU: mcu2_0: TOTAL LOAD = 1.93 % ( HWI = 0.56 %, SWI = 0.25 % )

          CPU: mcu2_0: TASK: TIVX_CAPT1: 0. 3 %

          CPU: mcu2_0: TASK: TIVX_DISP1: 0. 0 %

          GRAPH: app_multi_cam_graph (#nodes = 2, #executions = 0)
             NODE: CAPTURE1: capture_node: avg = 0 usecs, min/max = 18446744073709551 / 0 usecs, #executions = 0
             NODE: DISPLAY1: DisplayNode: avg = 0 usecs, min/max = 18446744073709551 / 0 usecs, #executions = 0

Hi  Brijesh

      I patch the tivx reset patch. but 0x4504048 still is 0x00333300.

      /cfs-file/__key/communityserver-discussions-components-files/791/tiovx.patch

Hi Herry Huang,

Are you seeing overflow or CRC/ECC errors? Is it just the clock in ultra low power state? Can you please probe the signals on the clock lane and check if it is correct? 

Regards,

Brijesh

Hi Brijesh

     I read 0x4504028 reg is 0x00000000.

     I judge DPHY is wrong, Parse LP to HS have some error, so CSI_RX_IF not work.

     We have make so many customer board. have 5% chance have this issue.and add a capacity on Clock Negative is OK. But that is not the right way.

     So i try to find out where is the problem.

     I only find DPHY statue in CSI_TX in 0x440 4028. How can i confirm CSI_RX in which register? could you tell me? Thank you very much.

Brijesh Jadav said:

Is it just the clock in ultra low power state?

Hi  Brijesh

     I check the 0x4580c10 register, if can work that is 0x29 or 0x2d, but if could not work, that 0x4580c10 register is 0x1, is it enter ULP mode?

but due to waveform , that is LP11->LP01->LP00, is HS mode request, so i am so confuse.