AM625: The GPMC interfacing with the FPGA.

Hi Astro,

What OS is used on AM625? Processor SDK Linux or MCU+ SDK?

Hi, Bin 

We plan to use Linux for the A53 core.
However, it is undecided which core (A52 or M4F) will execute the above operation, so I would like to know whether it can be realized with each SDK.

Thanks,

Astro

Hi Astro,

The Processor SDK Linux doesn't enable GPMC support for AM625 yet, but the Linux GPMC driver used on similar devices (such as AM64x) doesn't support DMA, so I doubt the AM625 Linux GPMC driver would support DMA either.

I am routing your query to our MCU+ SDK expert for comments on whether MCU+ SDK GPMC driver supports DMA or not.

Hi, Bin Liu

Thank you for your reply,

Bin Liu said:

I am routing your query to our MCU+ SDK expert for comments on whether MCU+ SDK GPMC driver supports DMA or not.

We look forward to hearing from MCU+ SDK expert.

Thanks,

Astro

Hi, Bin Liu, MCU+ Team

Do you have any update?

I would appreciate it if you could respond to either of the following two types.

1). Output DREQ with built-in TIMER and perform DMA transfer
2). Receive DREQ from external IC and perform DMA transfer

The AM335x could not do both 1) and ２) above.
If you need to disclose the source of the driver that somehow drives the DMA on the current AM335x, I can send it to you in a private message.

Thanks,

Astro

Conor said:

It is about DMA transfer from FPGA. I want to connect FPGA and AM62xx via GPMC and transfer data calculated by FPGA.
Is it possible to periodically DMA transfer to AM62x by triggering a timer interrupt?

Hello Astro,

Yes it is possible to transfer DMA by triggering a timer interrupt.

For AM62 the GPMC is connected to the main domain and you need to interface the external device to the main domain.

You can see 10.1.5 Time Synchronization Support in TRM for more details.

CMP_event_introuter allows the processor to be periodically interrupted by any compared events
Use the compare event to generate periodic control over  to trigger a block copy DMA transfer.

You should use the path below to trigger your DMA transfers.

I can suggest you that you can try to use GPMC peripheral from main domain.

Regards,

S.Anil.

Hi, S.Anil

1) Is "ICSSM" INTC embedded in PRU ICSSM?

2) I don't quite understand the difference between using Timesynch_event_router and CMP_event_introuter. Is it equally possible to use BCDMA triggers inside Timesynch_event_router by interrupts in GTC?

3) I plan to use the Linux SDK, is the above feasible? If it is possible, I would like to know the specific setting method.

Thanks,

Astro

Conor said:

1) Is "ICSSM" INTC embedded in PRU ICSSM?

2) I don't quite understand the difference between using Timesynch_event_router and CMP_event_introuter. Is it equally possible to use BCDMA triggers inside Timesynch_event_router by interrupts in GTC?

3) I plan to use the Linux SDK, is the above feasible? If it is possible, I would like to know the specific setting method.

Hello Astro,

Please check my answers below.

1. Yes even ICSSM INTC is embedded in PRU ICSSM , we can route compare events to main Domain.

Please check the below image for more details.

2. Timesynch_event_router enables the flexibility to choose any time synchronization source, whether it is the time
synchronization source coming from the external pin or the synchronization pulse generated by the internal
peripheral or from the ARM system time counter. Timesynch_event_router also enables the system to utilize
time synchronized signal as block copy DMA trigger or as periodical control of EPWM.

The CMP_event_introuter allows the processor to be interrupted by any of the compared events periodically or
use a compared event to generate periodical control on EPWM or triggering block copy DMA transfer. 

I can say that you can trigger DMA events either with Comparator method or Timer method . It is purely based on your requirement .

If you want to trigger DMA events periodically, you can enable any interrupt from ICSSM.pr1_iep0_cmp_intr_req.0 to ICSSM.pr1_iep0_cmp_intr_req.015.in CMP_EVENT_Interrupt  .

 or 

If you want to trigger DMA events with any sync events like PWM or any other HW sysnc pulse, you can use timersynch method.

Please find the attached image for more details.

3. I am not fully aware with Linux SDK and will post this information to team .

Regards,

S.Anil.

Hi, S.Anil

Thank you for answering questions 1 and 2.
I will check the answers above and contact you if I have any additional questions.
I am also waiting for your response to question 3.

Thanks,

Astro

Hi, S.Anil

>You should take care of these drivers.
When developing on Linux, we understand that AM62x is not currently capable of doing what we want to do.
Is there any possibility to realize it in the future?

Thanks,

Astro

Conor said:

Is there any possibility to realize it in the future?

Hello Astro,

Sorry for the late reply TI India team was out of office for the last 2 days as it was a holiday.

You may have individual GPMC driver and DMA driver support in the future.

But you need to handle DMA triggers with IEP, currently there is no plan to support DMA+IEP triggers in MCU_SDK or Linux+SDK.

Please let me know if this helps you.

Regards,

S.Anil. 

Hi, S.Anil. 

Is it possible to use an external GPIO as DREQ?
I think that If AM62 can output the timer to an external pin and return that signal to the CPU as DREQ, it can achieve desired function.

Alternatively, is it possible to interrupt Cortex-M at a constant cycle, take in data from GPMC in the interrupt handler, and write it to DRAM?

Thanks,
Astro

Hello Astro,

I will provide more details on the above topic by the end of the week or early next week as I am busy dealing with high priority customer issue.

Regards,

S.Anil.

Hi, S.Anil.

We are waiting for your reply!

Thanks,
Astro

Hello Astro,

Sorry for the late response as I said earlier I was dealing with a customer issue.

Conor said:

Alternatively, is it possible to interrupt Cortex-M at a constant cycle, take in data from GPMC in the interrupt handler, and write it to DRAM?

As per above comments I understand you are trying to use GPMC from MCU domain.

Usually GPMC is connected to main domain and if you try to use it in MCU domain you will face latency issues and currently there is no plan to support GPMC driver in MCU domain.

As mentioned earlier you can use GPMC interface from main domain and you will not face any latency issues while accessing GPMC and can use it effectively from main domain.

Conor said:

I think that If AM62 can output the timer to an external pin and return that signal to the CPU as DREQ, it can achieve desired function.

Could you please elaborate on the above comments for better understanding?

Or Please specify the module you expect from TRM ?

Regards,

S.Anil.

Hi, S.Anil

Swargam Anil said:

Usually GPMC is connected to main domain and if you try to use it in MCU domain you will face latency issues and currently there is no plan to support GPMC driver in MCU domain.

I understand that GPMC0 cannot use the MCU domain.

Swargam Anil said:

Could you please elaborate on the above comments for better understanding?

Or Please specify the module you expect from TRM ?

Connect AM62 timer output to GPIO. Then, the GPIO interrupt is used as the trigger for the DMA transfer.
I'm wondering if this kind of usage can be done with the current Linux SDK.

Thanks,

Astro

Conor said:

Connect AM62 timer output to GPIO. Then, the GPIO interrupt is used as the trigger for the DMA transfer.
I'm wondering if this kind of usage can be done with the current Linux SDK.

Hello Astro,

Yes you can trigger your DMA interrupts from GPIO interrupts and I can say that you can trigger DMA directly from timer interrupts instead of going with GPIO interrupt . Make sure you check all timing analysis when reading data from FPGA and writing data to DRAM.

Normally you have all the individual drivers like timer interrupts, GPIO interrupts and DMA examples in Linux + SDK.

You should use all the drivers together and make them work as your application.

I am sending your question to the Linux experts as the FPGA needs to access the GPMC driver + DMA. Bin already mentioned above the Linux SDK  no longer supports GPMC + DMA triggers and see what they suggest.

Regards,

S.Anil.

Hi, S.Anil.

Swargam Anil said:

I am sending your question to the Linux experts as the FPGA needs to access the GPMC driver + DMA. Bin already mentioned above the Linux SDK  no longer supports GPMC + DMA triggers and see what they suggest.

I am also wondering about the above.
We look forward to hearing from you.

Thanks,
Astro

Hello Astro

At this time the only GPMC-FPGA attach we have planned is part of Linux SDK. There is no plan to do anything in context of MCU+ SDK for M4 for GPMC support. Customer is free to take the Linux GPMC driver once available and modify further for their needs. 

Regards

Mukul