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SRIO Boot on C6455

MattB
Expert 2025 points

Hi,

We're working on the block diagram for a new board that includes a C6455 and at present SRIO boot is fundamental to our design.

We want to go to fix the design pretty soon and I was asked if I could guarantee that there aren't any problems with SRIO boot. I said "I'm sure it will be fine"! I don't yet know much about SRIO and was hoping someone could confirm that it will be fine.

We only intend to connect one of the channels (port0 I guess) and want to use 1.25Gb/s.

Unfortunately I'm not sure I fully understand the difference between 4 1x ports and 1 4x port. I'm hoping that 4 1x ports (boot configuration 0) means that port 0 will work on it's own and it doesn't matter that the other 3 are not connected to the host.

Any comments about SRIO would be boot greatfully received!

Thanks,

Matt

  • 0
    TI__Guru* 84110 points

    Please review these documents:

    C645x Bootloader User's Guide - spruec6 (b)
    C6455 errata - sprz234 (k)
    C645x SRIO User's Guide - spru976 (b)
    and the datasheet

    There is nothing in the errata to hurt your plan to bootload through SRIO, but you will want to be aware of interactions with other SRIO ports or PCI during reset operations.

    The C6455 has 4 SRIO ports that can each run at up to 3.125 Gbps. The SRIO UG explains in much better language than I can what the differences are between the 1x and 4x modes.

    But the bottom line is that you will want to use the 4 1x boot mode to use a single SRIO Tx/Rx pair to communicate with the host. And yes, it will work for the other 3 ports to be left unused, but be sure to follow any stipulations in the documentation about handling unused signals.

  • 0 in reply to RandyP
    Expert 2025 points

    Thanks for that, you've made me feel a little bit better!

    We're about to start prototyping a new board but it's going to have a long lead time and hence some areas are being glossed over.

    I've been reading the SRIO user guide for 2 days now and don't really understand yet but hopefully it will come!

    Thanks,

    Matt

  • 0
    Prodigy 20 points

    It's surely the EVM6455 with mezzanine card ,zhe host processor is TI'c6455.

    you really can move this thread to a new one,I just want to have more members join to this topic ,share experience and provide help to each others.

    now a few fproblem is confusing me:

    (1) in sprz976b.pdf, is 1x/4x stand for 1port and 4lane? is 1x/1x meas 1port and 1 lane? 4x/1x means 4port and 4 lane?

    (2) to srio ,the peak rate is 3.125Gb/s, so the peak rate of 1x/4x will be 12.5Gb/s, 4x/1x 's wiil be 12.5 too, and 1x/1x's will be 3.125,right?

    (3) is  the peak rate 3.125Gb/s  unidirectional ? if  be bilateral ,should rate be doubled? 6.25

    (3) in sprz976.pdf ,the 31-30bit of IP_mode_reg are R/W,why I can't write value to them?

    thanks for your attention, I truely look forward to your help