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hi~~
could you tell me about SRIO boot Sequence exactly.
I try to SRIO boot from TMS320C6455 to TMS320C6474.
I take two way of SRIO boot mode.
first, SRIO boot using direct io protocol.
second, SRIO boot using second boot with I2C EEPROM
but all SRIO boot mode are failed.
I don`t konw why......
Please, give me some way about SRIO boot(ex. SRIO boot example without Boot Test Package)
and please tell me about correct SRIO boot Sequence and SRIO boot example.
Please find the explanations in the Bootloader User's Guide, you can find it by clicking on either of the underlined links in your post, above. In the Product Folder, click on Technical Documents and find the Bootloader User's Guide.
For examples, please refer to the MultiCore Software Developer's Kit (MCSDK) 1.0 for the C6474.
Regards,
RandyP
If you need more help, please reply back. If this answers the question, please click Verify Answer , below.
Hi~
I try to SRIO boot using Direct I/O.
I verified that bootload image was written to C6474 in L2 memory.
But C6474 is never excuted....
I sent doorbell interrupt in 0x00800000.
I want to know why didn't c6474 excute.
Dong-Min Park said:I sent doorbell interrupt in 0x00800000
What does this mean exactly? Which doorbell did you send?
When you halt the DSP under CCS control, what is the DSP doing? Is it still executing in the ROM code address range?
Regards,
RandyP
c6455 is sent doorbell interrupt to c6474.
I check to recieve doorbell interupt in c6474 but c6474 never executing.
I think that c6474 was wait of status.
I try to send doorbell interrupt at 0x00800000, 0x10800000, 0x00806430 and 0x10806430.
I attatch My DspCode.h and source code.
Is there any problem??
/******************************************************************************
* FILE PURPOSE: SRIO API function calls
******************************************************************************
* FILE NAME: SrioAPI.c
*
* DESCRIPTION: Provides SRIO API functions for TCI6488/6487. Note for convenience,
* register direct read/write is done below, refer to CSL for better
* examples if needed.
*
* (C) Copywright reserved by Texas Instruments.
*****************************************************************************/
#include "SrioAPI.h"
/* provide some delay */
void delay_boot(unsigned int cycles)
{
unsigned int i;
for(i=0; i<cycles; i++){
asm("NOP");
}
}
///* Power on SRIO module */
//void PSC_SRIO_ON (void)
//{
// unsigned int ptstat;
//
// *(volatile int *) PSC_PDCTL2 |= 1;
// *(volatile int *) PSC_MDCTL7 |= 3;
// *(volatile int *) PSC_PTCMD |= 4;
//
// do {
// ptstat = DEVICE_REG32_R (PSC_PSTAT);
// ptstat = ptstat & (1 << 7);
// } while (ptstat != 0);
//
//}
/* SRIO config 0, Boot mode 8: SerDes ref clock: 125 MHz, Link rate= 1.25 Gbps */
void ConfigSRIO_Bootmode_8(void)
{
*(( unsigned int *)(0x2d00000 + 0x120)) = 0x0000000B; // MPY->PLL Multiply 10x , PLL ennable
*(( unsigned int *)(0x2d00000 + 0x100)) = 0x00081121; // EQ->1, CDR->000:first order, LOS->disable:loss of signal detection
*(( unsigned int *)(0x2d00000 + 0x104)) = 0x00081121; // ALIGN->Comma alignment enable, TERM->Common point set to 0.8 VDDT
// INVPAIR->Normal polarity, RETE->half rate, BUS-WIDTH->10bit operation
// ENRX->Enable receiver
*(( unsigned int *)(0x2d00000 + 0x110)) = 0x00000921; // SWING->750mV, CM->Raised common mode, INVPAIR->Normal polarity,
*(( unsigned int *)(0x2d00000 + 0x114)) = 0x00000921; // RETE->half rate, BUS-WIDTH->10bit operation, ENTX->Enable TX
delay_boot(10000);
*(( unsigned int *)(0x2d00000 + 0x1010)) = 0x20000019; // LARGE_SUPPORT->PE supports common transport large systems, EXTENDED_FEATURE valid, PE supports 34bit address
*(( unsigned int *)(0x2d00000 + 0x1018)) = 0x0000FDF4; // all source operations is enable
*(( unsigned int *)(0x2d00000 + 0x101c)) = 0x0000FC04; // all destination operations is enable, except atomic
*(( unsigned int *)(0x2d00000 + 0x1100)) = 0x10000002; // General endpoint device with software assisted error recovery option
*(( unsigned int *)(0x2d00000 + 0x115c)) = 0x00600001; // port 0 Output port enable
*(( unsigned int *)(0x2d00000 + 0x117c)) = 0x00600001; // port 1 Output port enable
*(( unsigned int *)(0x2d00000 + 0x105C)) = 0x005A0200; // ? Local Configuration Space Base Address 1 CSR (LCL_CFG_BAR)
///* base ID */
// *(( unsigned int *)(0x2d00000 + 0x1060)) = DEVICEID_REG;
///* device id 1 & 2 */
// *(( unsigned int *)(0x2d00000 + 0x80)) = DEVICEID_REG;
// *(( unsigned int *)(0x2d00000 + 0x84)) = DEVICEID_REG;
/* base ID */
*(( unsigned int *)(0x2d00000 + 0x1060)) = 0x00030003;
/* device id 1 & 2 */
*(( unsigned int *)(0x2d00000 + 0x80)) = 0x00FFFFFF;
*(( unsigned int *)(0x2d00000 + 0x84)) = 0x00FFFFFF;
*(( unsigned int *)(0x2d00000 + 0x12004)) = 0x48000000; //SP_MODE->4Port(1x mode each), IDLE_ERR_DIS->Error checking enable, PW_DIS->disable port wire error reporting
//TGT_ID_DIS->Packet accepted with any DestID and forwarded to the logical layer
//SELF_RST->Self reset interrupt disabled (default), interrupt signal is asserted
*(( unsigned int *)(0x2d00000 + 0x90)) = 0xffffffff; //Disable %consider
*(( unsigned int *)(0x2d00000 + 0x94)) = 0x0003ffff; //Disable %consider
*(( unsigned int *)(0x2d00000 + 0x98)) = 0xffffffff; //Disable
*(( unsigned int *)(0x2d00000 + 0x9c)) = 0x0003ffff; //Disable
*(( unsigned int *)(0x2d00000 + 0x280)) = 0x44444444; //Routed to INTDST4
*(( unsigned int *)(0x2d00000 + 0x320)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x324)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x330)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x334)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x12008)) = 0x00000008;//0x00000008;
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x80000000;
*(( unsigned int *)(0x2d00000 + 0x20)) = 0x05053910;
//*(( unsigned int *)(0x2d00000 + 0x20)) = 0x05053750;
*(( unsigned int *)(0x2d00000 + 0x04)) = 0x00000005;
/* needed, otherwise it will not be able to send requests out */
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x60000000;
}
/* SRIO config 1, Boot mode 9: SerDes ref clock: 125 MHz, Link rate= 3.125 Gbps */
void ConfigSRIO_Bootmode_9(void)
{
*(( unsigned int *)(0x2d00000 + 0x120)) = 0x0000000F;
*(( unsigned int *)(0x2d00000 + 0x100)) = 0x00081101;
*(( unsigned int *)(0x2d00000 + 0x104)) = 0x00081101;
*(( unsigned int *)(0x2d00000 + 0x110)) = 0x00000901;
*(( unsigned int *)(0x2d00000 + 0x114)) = 0x00000901;
delay_boot(10000);
*(( unsigned int *)(0x2d00000 + 0x1010)) = 0x20000019;
*(( unsigned int *)(0x2d00000 + 0x1018)) = 0x0000FDF4;
*(( unsigned int *)(0x2d00000 + 0x101c)) = 0x0000FC04;
*(( unsigned int *)(0x2d00000 + 0x1100)) = 0x10000002;
*(( unsigned int *)(0x2d00000 + 0x115c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x117c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x105C)) = 0x005A0200;
/* base ID */
*(( unsigned int *)(0x2d00000 + 0x1060)) = DEVICEID_REG;
/* device id 1 & 2 */
*(( unsigned int *)(0x2d00000 + 0x80)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x84)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x12004)) = 0x4D000000;
*(( unsigned int *)(0x2d00000 + 0x90)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x94)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x98)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x9c)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x280)) = 0x44444444;
*(( unsigned int *)(0x2d00000 + 0x320)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x324)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x330)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x334)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x12008)) = 0x00000008;
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x20)) = 0x0D053910;
*(( unsigned int *)(0x2d00000 + 0x04)) = 0x00000005;
/* needed, otherwise it will not be able to send requests out */
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x60000000;
}
/* SRIO config 2, Boot mode 10: SerDes ref clock: 156.25 MHz, Link rate= 1.25 Gbps */
void ConfigSRIO_Bootmode_10(void)
{
*(( unsigned int *)(0x2d00000 + 0x120)) = 0x00000009;
*(( unsigned int *)(0x2d00000 + 0x100)) = 0x00081121;
*(( unsigned int *)(0x2d00000 + 0x104)) = 0x00081121;
*(( unsigned int *)(0x2d00000 + 0x110)) = 0x00000921;
*(( unsigned int *)(0x2d00000 + 0x114)) = 0x00000921;
delay_boot(10000);
*(( unsigned int *)(0x2d00000 + 0x1010)) = 0x20000019;
*(( unsigned int *)(0x2d00000 + 0x1018)) = 0x0000FDF4;
*(( unsigned int *)(0x2d00000 + 0x101c)) = 0x0000FC04;
*(( unsigned int *)(0x2d00000 + 0x1100)) = 0x10000002;
*(( unsigned int *)(0x2d00000 + 0x115c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x117c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x105C)) = 0x005A0200;
/* base ID */
*(( unsigned int *)(0x2d00000 + 0x1060)) = DEVICEID_REG;
/* device id 1 & 2 */
*(( unsigned int *)(0x2d00000 + 0x80)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x84)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x12004)) = 0x4D000000;
*(( unsigned int *)(0x2d00000 + 0x90)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x94)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x98)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x9c)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x280)) = 0x44444444;
*(( unsigned int *)(0x2d00000 + 0x320)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x324)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x330)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x334)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x12008)) = 0x00000008;
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x20)) = 0x0D053910;
*(( unsigned int *)(0x2d00000 + 0x04)) = 0x00000005;
/* needed, otherwise it will not be able to send requests out */
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x60000000;
}
/* SRIO config 3, Boot mode 11: SerDes ref clock: 156.25 MHz, Link rate= 3.125 Gbps */
void ConfigSRIO_Bootmode_11(void)
{
*(( unsigned int *)(0x2d00000 + 0x120)) = 0x0000000B;
*(( unsigned int *)(0x2d00000 + 0x100)) = 0x00081101;
*(( unsigned int *)(0x2d00000 + 0x104)) = 0x00081101;
*(( unsigned int *)(0x2d00000 + 0x110)) = 0x00000901;
*(( unsigned int *)(0x2d00000 + 0x114)) = 0x00000901;
delay_boot(10000);
*(( unsigned int *)(0x2d00000 + 0x1010)) = 0x20000019;
*(( unsigned int *)(0x2d00000 + 0x1018)) = 0x0000FDF4;
*(( unsigned int *)(0x2d00000 + 0x101c)) = 0x0000FC04;
*(( unsigned int *)(0x2d00000 + 0x1100)) = 0x10000002;
*(( unsigned int *)(0x2d00000 + 0x115c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x117c)) = 0x00600001;
*(( unsigned int *)(0x2d00000 + 0x105C)) = 0x005A0200;
/* base ID */
*(( unsigned int *)(0x2d00000 + 0x1060)) = DEVICEID_REG;
/* device id 1 & 2 */
*(( unsigned int *)(0x2d00000 + 0x80)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x84)) = DEVICEID_REG;
*(( unsigned int *)(0x2d00000 + 0x12004)) = 0x4D000000;
*(( unsigned int *)(0x2d00000 + 0x90)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x94)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x98)) = 0xffffffff;
*(( unsigned int *)(0x2d00000 + 0x9c)) = 0x0003ffff;
*(( unsigned int *)(0x2d00000 + 0x280)) = 0x44444444;
*(( unsigned int *)(0x2d00000 + 0x320)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x324)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x330)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x334)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x12008)) = 0x00000008;
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x00000000;
*(( unsigned int *)(0x2d00000 + 0x20)) = 0x0D053910;
*(( unsigned int *)(0x2d00000 + 0x04)) = 0x00000005;
/* needed, otherwise it will not be able to send requests out */
*(( unsigned int *)(0x2d00000 + 0x113c)) = 0x60000000;
}
/* Configure SRIO to have the same linkrate as per TCI6488/6487 DSP. */
void SRIOConfigure(int bootmode)
{
//PSC_SRIO_ON();
switch(bootmode) {
default:
case SRIOBootConfig0:
ConfigSRIO_Bootmode_8();
break;
case SRIOBootConfig1:
ConfigSRIO_Bootmode_9();
break;
case SRIOBootConfig2:
ConfigSRIO_Bootmode_10();
break;
case SRIOBootConfig3:
ConfigSRIO_Bootmode_11();
break;
}
}
/* Return if Port is OK or not */
int SRIOPortStatus(int port)
{
unsigned int count,value,portok;
count = 0;
portok= 0;
while(1)
{ if(port == PORT0) value = *((volatile unsigned int *)(0x2d00000 + 0x1158)); /* SP0_ERR_STAT */
else value = *((volatile unsigned int *)(0x2d00000 + 0x1178)); /* SP1_ERR_STAT */
if((value & 0x02) !=0) {
portok++;
if(portok >= 50) break; /* port must be solid OK */
delay_boot(100);
} else {
portok = 0;
count++;
if(count>=SRIO_TIMEOUT) return(-1);
}
delay_boot(1000);
}
return(0);
}
/*
Transfer (size_bytes) bytes data from host address (host_addr) to device ID's
(rio_id) global address (dsp_addr). Lane 0 is used for booting.
rio_id: destination device id
host_addr: host's address
dsp_addr: target dsp's global address
size_bytes: size in bytes
*/
int SRIOTransfer(int rio_id, int port, unsigned int host_addr, unsigned int dsp_addr, int size_bytes)
{
unsigned int count,busy;
/* Perform a transfer */
/* LSU 1 Reg 0 - MSB of destination */
*((volatile unsigned int *)0x2d00400) = 0x00000000;
/* LSU 1 Reg 1 - LSB of destination */
*((volatile unsigned int *)0x2d00404) = (unsigned int)dsp_addr;
/* LSU 1 Reg 2 - source address */
*((volatile unsigned int *)0x2d00408) = (unsigned int)host_addr;
/* LSU 1 Reg 3 - Byte count */
*((volatile unsigned int *)0x2d0040c) = size_bytes;
/* LSU 1 Reg 4 -
* out port ID = 0
* Priority = 2
* XAM = 0
* ID size = 1 (16 bit)
* Dest ID specified as arg
* interrupt request = 0 */
*((volatile unsigned int *)0x2d00410) = 0x21000000 | (rio_id << 8) | (port << 30);;
/* LSU 1 Reg 5 -
* doorbell info = 0 for this packet type
* hop count = 0 for this packet type
* Packet type = 0x54 - ftype = 5, ttype = 4
* nwrite packet type.
* Writing this register should initiate the transfer */
*((volatile unsigned int *)0x2d00414) = 0x00000054;
/* wait for it to complete */
count = 0;
while(1)
{
busy = *((volatile unsigned int *)0x2d00418);
if((busy & 0x00000001) == 0) break;
count++;
if(count>=SRIO_TIMEOUT) return(-1);
delay_boot(1000);
}
return(0);
}
/*
Send a door bell interrupt to DSP to wake it up. Lane 0 is used for booting.
rio_id: destination device id
*/
int SRIODoorBell(int rio_id, int port)
{
unsigned int count,busy;
/* LSU 1 Reg 0 - MSB of destination */
*((unsigned int *)0x2d00400) = 0;
/* LSU 1 Reg 1 - LSB of destination */
//*((unsigned int *)0x2d00404) = 0;
*((unsigned int *)0x2d00404) = 0x10806430;
/* LSU 1 Reg 2 - source address */
*((unsigned int *)0x2d00408) = 0;
/* LSU 1 Reg 3 - byte count */
*((unsigned int *)0x2d0040c) = 0;
/* LSU 1 Reg 4 - */
*((unsigned int *)0x2d00410) = 0x21000000 | (rio_id << 8)| (port << 30);;
/* LSU 1 Reg 5
* doorbell info 0
* hop count 3
* Packet type = 0xa0 ftype = 10, ttype = 0 */
*((unsigned int *)0x2d00414) = 0x000000a0;
/* wait for it to complete */
count = 0;
while(1)
{
busy = *((volatile unsigned int *)0x2d00418);
if((busy & 0x00000001) == 0) break;
count++;
if(count>=SRIO_TIMEOUT) return(-1);
delay_boot(1000);
}
return(0);
}
/*****************************************************************************
* SRIO Boot Function
*****************************************************************************/
/* Convert bytes to 32 bits */
unsigned int byteto32bits(unsigned char *pDspCode)
{
int i;
unsigned int temp;
temp = *pDspCode++;
for(i=0; i<3;i++) {
temp <<= 8;
temp |= *pDspCode++;
}
return(temp);
}
/* Convert to big endian, if the .out to be booted is big endian, this is not required */
void Convert2BigEndian(unsigned int *pDspCode, int size)
{
unsigned int i;
unsigned int temp;
for(i=0; i<size; i+=4, pDspCode++) {
temp = *pDspCode;
temp = (temp>>24) |
((temp<<8) & 0x00FF0000) |
((temp>>8) & 0x0000FF00) |
(temp<<24);
*pDspCode= temp;
}
}
/* Send boot tables to DSP and then door bell interrupt to boot the DSP
pDspCode: points to DSP code;
DeviceID: device ID.
*/
int bootDSP(unsigned char *pDspCode,int DeviceID)
{
unsigned int i;
unsigned int size;
unsigned int count, remainder;
unsigned int startaddr;
/* Skip the boot entry address */
pDspCode+=4;
while(1) {
/* Get the size */
size = byteto32bits(pDspCode);
if(size == 0) break;
pDspCode += 4;
startaddr = byteto32bits(pDspCode);
pDspCode+= 4;
count = size/SIZELIMIT;
remainder = size - count * SIZELIMIT;
for(i=0; i<count; i++) {
/* This is not needed if the .out to be booted is big endian already */
Convert2BigEndian((unsigned int *)pDspCode,SIZELIMIT);
/* Transfer boot tables to DSP */
if(SRIOTransfer(DeviceID, PORT1, (unsigned int )pDspCode, (unsigned int )startaddr, SIZELIMIT)!=0) return(-1);
pDspCode += SIZELIMIT;
startaddr += SIZELIMIT;
}
/* This is not needed if the .out to be booted is big endian already */
Convert2BigEndian((unsigned int *)pDspCode,remainder);
if(SRIOTransfer(DeviceID, PORT1,(unsigned int )pDspCode, (unsigned int )startaddr, remainder)!=0) return(-1);
pDspCode += remainder;
}
/* Send door bell interrupts */
/* Note: Faraday EVM port 1 connected between two DSPs */
//if(SRIOTransfer(DeviceID, PORT1, (unsigned int )pDspCode, (unsigned int )startaddr, SIZELIMIT)!=0) return(-1);
if(SRIODoorBell(DeviceID,PORT1)!=0) return(-1);
return(0);
}
#ifndef _SRIOAPI_H #define _SRIOAPI_H /* Check host side's SRIO capabilities on size limit for each transfer, size limit is on bytes */ #define SIZELIMIT 1000 #define DEVICEID 0x0003 #define DEVICEID_REG (DEVICEID<<16|DEVICEID) #define TARGET_DEVICEID 0x0080 #define SRIO_TIMEOUT 50000 /* Boot modes */ #define SRIOBootConfig0 8 #define SRIOBootConfig1 9 #define SRIOBootConfig2 10 #define SRIOBootConfig3 11 #define PORT0 0 #define PORT1 1 /* PSC registers */ #define PSC_PDCTL2 0x02ac0308 #define PSC_MDCTL7 0x02ac0a1c #define PSC_PTCMD 0x02ac0120 #define PSC_PSTAT 0x02ac0128 void SRIOConfigure(int bootmode); int SRIOPortStatus(int port); int SRIOTransfer(int rio_id, int port, unsigned int host_addr, unsigned int dsp_addr, int size_bytes); int SRIODoorBell(int rio_id, int port); unsigned int byteto32bits(unsigned char *pDspCode); void Convert2BigEndian(unsigned int *pDspCode, int size); int bootDSP(unsigned char *pDspCode,int DeviceID); #endif /* _SRIOAPI_H */
#pragma DATA_SECTION(DspCode, ".DspCode")
#pragma DATA_ALIGN(DspCode,8);
unsigned char DspCode[]={
0x10, 0x80, 0x5D, 0x60, 0x00, 0x00, 0x03, 0x3C, 0x10, 0x80, 0x64, 0x30, 0x00, 0x00, 0x01, 0xBC, 0x10, 0x80, 0x5F, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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