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Automatic Level Control

I have found very little documentation on the automatic level control in the DM365/DM368 audio codec.

1) Does such documentation exists? If so, where?

2) What is the target level for the ALC algorithm? 

3) Is the target level programmable? If so, how?

4) Does the ALC control both the LNA (20,26dB) and the digital gain stage (0,6,12,18dB) ?

5) How quickly does the ALC algorithm adapt?

6) Does the ALC adapt the gain up at the same rate as it adjust down? Or is it asymmetric, i.e. quicker to adjust gain down than up to avoid clipping?

  •  
    1)
    TMS320DM36x DMSoC Voice Codec User's Guide
     
    2)
    -6dB
     
    3)
    No.
     
    4)
    No.
     
    5), 6)
    Please find wave examples in attached file.
     
    Best regards,
    kimura
     

    6087.alc_response.pdf

  • Kimura,

    Thanks for the information. It is helpful. I have a few follow-up questions.

    A) If the ALC does not control the LNA (26/20dB) and/or PGA (0/6/12/18dB), what does it control?

    B) Does the ALC control the audio signal in the analog or digital domain? 

    C) The response document that shows the response to step functions is very helpful. But, it shows a response to a 2x (6dB) step, so I don't know if the ALC controls the gain with fine resolution or in larger discrete steps. Is the control close to continuous, or it is control in discrete steps? What size are the discrete steps?

    D) If a developer uses ALC, do they still need to control the LNA (26/20dB) and/or PGA (0/6/12/18dB) stages themselves? 

    E) If the ALC adds some digital gain to the digital signal after the ADC, can that gain be read from some register? If so, which register and how is the register interpreted?

    Thanks!  -- Matthew

     

  • Matthew,

    A)
    Gain setting of digital PGA (GAD[1:0]) must be set to 00 when ALC is enabled.
    See page 32 in Voice codec user's guide.
    You can set LNA (Gain setting of MIC amp GAA) manually.

    B)
    Digital domain.  See page 11 in user's guide.

    C)
    It is controlled in discrete step.  I can not disclose step size due to design reason.

    D)
    You can control LNA manually.  PGA must set to GAD[1:0] = 00.
    See answer A). and user's guide.

    E)
    Unfortunately no.

    regards,
    kimura