Other Parts Discussed in Thread: SYSBIOS
Hi, TI experts,
1. Our project TDA4 device C660 occur exception error, as follows.

2. Got the global value of ti_sysbios_family_c64p_Excaption_Module_state, as follows.

3. As the above shown, the IERR is 0x10, happed Resource conflict exception.
4. As https://e2e.ti.com/support/processors-group/processors/f/processors-forum/150087/resource-conflict-exception-nrp-in-_knl_queues said, Also check the B15 stack memory and Code, not fond stack overflow or memroy overlap
5. The last reason of shared data structure cache can say detail. Becasue in our code, we has a inmage data flow A72->C660->R5F2_0
5.1 A72 GPU handle around image(RGBA format) and send to C660.
5.2 C660 covert GRBA to YUV format, and using UDMA and L2 Cache memory, Then sending to R5F2_0
5.3 R5F2_0 send the yuv data to vehicle through MIPI_TX
5.4 Because the image data communication cross core, if the cache not consistency, can be occur the exception error when use udma or L2 Cache?