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AM3352: DMA transfer end interrupt does not occur

Guru 12065 points
Part Number: AM3352

Hi,

I am trying to perform DMA transfer from the MCU's built-in LCD controller by referring to the code below. However, the DMA transfer end interrupt does not occur.

AM335X StarterWare
Code: ”examples\evmAM335x\raster\rasterDisplay.c"

    // /* Enabling IRQ in CPSR of ARM processor. */
    // IntMasterIRQEnable();     Already done

    //  /* Initializing the ARM Interrupt Controller. */
    // IntAINTCInit();           Already done

    // disable interrupt handler
    i_dis_ext(SYS_INT_LCDCINT);

    // register interrupt handler
    INTC_IntInstall(LcdcDmaFinishedHandler, SYS_INT_LCDCINT, 1, INTC_INT_IRQ);

    // enable interrupt handler
    i_ena_ext(SYS_INT_LCDCINT);
    
    // LCD module input clock setting
    LCDModuleClkConfig();

    // Use pin setting
    LCDPinMuxSetup();

    // LCD module internal clock enable setting
    RasterClocksEnable(SOC_LCDC_0_REGS);

    // Disable the LCD controller when setting
    RasterDisable(SOC_LCDC_0_REGS);

    // PCLK setting
    RasterClkConfig(SOC_LCDC_0_REGS, LCDC_PCLK, LCDC_DISP_PLL_CLKOUT);

    // LCDC DMA settings
    RasterDMAConfig(SOC_LCDC_0_REGS, RASTER_SINGLE_FRAME_BUFFER,
                    RASTER_BURST_SIZE_16, RASTER_FIFO_THRESHOLD_8,
                    RASTER_BIG_ENDIAN_DISABLE);

    //LCDC mode setting
    RasterModeConfig(SOC_LCDC_0_REGS, RASTER_DISPLAY_MODE_TFT_PACKED,
                     RASTER_DATA, RASTER_COLOR, RASTER_RIGHT_ALIGNED);

    // PCLK, HSYNC, VSYNC signal settings
    RasterTiming2Configure(SOC_LCDC_0_REGS, RASTER_FRAME_CLOCK_LOW  |
                                            RASTER_LINE_CLOCK_LOW   |
                                            RASTER_PIXEL_CLOCK_LOW  |
                                            RASTER_SYNC_EDGE_FALLING|
                                            RASTER_SYNC_CTRL_ACTIVE |
                                            RASTER_AC_BIAS_HIGH     , 0, 0);

    // HSYNC section setting
    RasterHparamConfig(SOC_LCDC_0_REGS, DEF_CLCD_XMAX, LCDC_HSYNC_PULSE_WIDTH, LCDC_HSYNC_FRONT_PORCH, LCDC_HSYNC_BACK_PORCH);

    // VSYNC interval setting
    RasterVparamConfig(SOC_LCDC_0_REGS, DEF_CLCD_YMAX, LCDC_VSYNC_PULSE_WIDTH, LCDC_VSYNC_FRONT_PORCH, LCDC_VSYNC_BACK_PORCH);

    // End of Frame0 interrupt enabled for status reference
    RasterIntEnable(SOC_LCDC_0_REGS, RASTER_END_OF_FRAME0_INT);
    
    // Set the data to make the entire LCD white
    for(int ii=0;ii<LCDC_PIXEL_DATA_SIZE;ii++){
        LCDCBitMap[LCDC_FRAME0][ii] = 0xff;
    }

    // DMA transfer source setting
    RasterDMAFBConfig(SOC_LCDC_0_REGS, 
                    (unsigned int)&LCDCBitMap[LCDC_FRAME0][0],
                    (unsigned int)&LCDCBitMap[LCDC_FRAME0][LCDC_PIXEL_DATA_SIZE-1],
                    LCDC_FRAME0);
    
    // Raster Enable
    RasterEnable(SOC_LCDC_0_REGS);

    // Wait 100ms (for debug)
    hardwait(100000);

    // Get DMA transfer status (for debug)
    uint status = RasterIntStatus(SOC_LCDC_0_REGS,RASTER_END_OF_FRAME0_INT_STAT);

After setting the transfer source with RasterDMAFBConfig() and executing RasterEnable(), 0x100 can be obtained with RasterIntStatus(), so it is assumed that the transfer itself has finished.

Could you tell me if there is anything that can be considered as the reason why the transfer end interrupt is not raised?

Since other interrupts such as the timer interrupt (SYS_INT_TINT1_1MS, No. 67) are still operating during this time, we do not think there is any particular problem with the processing for accepting interrupts.

Thanks,

Astro