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Hi team,
we ran our application using TI-RTOS (sdk 7.03) which ran successfully, but when we migrated and using Freetos (8.02 sdk) our application is running too slow, but we are using same DDR memory, could you help us with this. I am adding our main.c file for your reference to compare with 7.03 and 8.02 sdk.
#our tirtos main file-
/*============================== INCLUSIONS =============================*/
/* XDCtools Header files*/
#include "Data_Types.h"
#include <xdc/std.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>
/* BIOS Header files */
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>
#include <ti/sysbios/knl/Clock.h>
#include <ti/csl/arch/csl_arch.h>
#include <ti/csl/soc.h>
#include <ti/csl/cslr.h>
#include <ti/osal/osal.h>
#include <ti/osal/TaskP.h>
#include <ti/osal/TimerP.h>
#include "Main_Startup.h"
#include "swc_SystemSignalAdapter_main.h"
#include "Can.h"
#include "Com.h"
#include "PduR.h"
#include "CanIf.h"
#include "IpduM.h"
#include "AP_Function_Component.h"
#include "AP_JI2019_StradVision.h"
#include "AP_Generic_Perception_Interface_100ms.h"
#include "AP_ADAS_Generic_Interface_10ms.h"
#include "AP_Generic_Perception_Interface_5ms.h"
//#include "AP_VizAD_Interface_100ms.h"
#include "VizAD_AP_Interface_100ms.h"
#include "SensorFusion.h"
#include "ParkingSpaceFiltering.h"
#include "AP_ADAS_Generic_Interface_Types.h"
#include "mcu_timer_multicore.h"
#include "rte_abs_SystemSignalAdapter.h"
#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200)))
#include <ti/drv/sciclient/sciserver_tirtos.h>
#endif
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
/* Test application stack size */
#define APP_TASK_STACK (512U * 1024U)
//#define APP_TASK_STACK (24U * 1024U)
/**< Stack required for the stack */
#define ONE_MS_TASK_NAME_SAP ("ApplicationTask1ms_TaskFunction_SAP")
#define ONE_MS_TASK_NAME_CAN ("ApplicationTask1ms_TaskFunction_CAN")
#define FIVE_MS_TASK_NAME ("ApplicationTask5ms_TaskFunction")
#define TEN_MS_TASK_NAME ("ApplicationTask10ms_TaskFunction")
#define FIFTY_MS_TASK_NAME ("ApplicationTask50ms_TaskFunction")
#define SIXTY_MS_TASK_NAME ("ApplicationTask60ms_TaskFunction")
#define HUNDRED_MS_TASK_NAME ("ApplicationTask100ms_TaskFunction")
#define TWOHUNDRED_MS_TASK_NAME ("ApplicationTask200ms_TaskFunction")
/* Clock_tickPeriod is in units of usecs */
#define ONE_MS_TIMEOUT (uint32)1000
#define FOUR_MS_TIMEOUT (uint32)4000
#define FIVE_MS_TIMEOUT (uint32)5000
#define TEN_MS_TIMEOUT (uint32)10000
#define FIFTY_MS_TIMEOUT (uint32)50000
#define SIXTY_MS_TIMEOUT (uint32)60000
#define HUNDRED_MS_TIMEOUT (uint32)100000
#define TWOHUNDRED_MS_TIMEOUT (uint32)200000
#define INFINITE (1U)
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
/* None */
/* ========================================================================== */
/* Function Declarations */
/* ========================================================================== */
static Void ApplicationTask1ms_TaskFunction_SAP(UArg a0, UArg a1);
static Void ApplicationTask1ms_TaskFunction_CAN(UArg a0, UArg a1);
static Void ApplicationTask5ms_TaskFunction(UArg a0, UArg a1);
static Void ApplicationTask10ms_TaskFunction(UArg a0, UArg a1);
static Void ApplicationTask50ms_TaskFunction(UArg a0, UArg a1);
static Void ApplicationTask60ms_TaskFunction(UArg a0, UArg a1);
static Void ApplicationTask100ms_TaskFunction(UArg a0, UArg a1);
static Void ApplicationTask200ms_TaskFunction(UArg a0, UArg a1);
static void Task_Periodicity(uint32 usec);
sint32 SetupSciServer(void);
static void Initialise_Bsw(void);
/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */
/* application stack */
static uint8_t ApplicationTask1ms_TaskStack_SAP[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask1ms_TaskStack_CAN[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask5ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask10ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask50ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask60ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask100ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
static uint8_t ApplicationTask200ms_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
/* ========================================================================== */
/* External Variables */
/* ========================================================================== */
/* ========================================================================== */
/* Function Definitions */
/* ========================================================================== */
int main(void)
{
Task_Handle task;
Error_Block eb;
Task_Params taskParams_1ms_SAP;
Task_Params taskParams_1ms_CAN;
Task_Params taskParams_5ms;
Task_Params taskParams_10ms;
Task_Params taskParams_50ms;
Task_Params taskParams_60ms;
Task_Params taskParams_100ms;
Task_Params taskParams_200ms;
sint32 ret = CSL_PASS;
AppUtils_Init();
/* Initialize SCI Client Server */
ret = SetupSciServer();
if(ret != CSL_PASS)
{
BIOS_exit(0);
}
Main_Startup();
Main_PowerAndClkSrc();
Main_PlatformInit();
mcu_timer_init();
Initialise_Bsw();
Error_init(&eb);
#if 0
/* Initialize the 5ms application and BSW task parameters*/
Task_Params_init(&taskParams_1ms_SAP);
taskParams_1ms_SAP.instance->name = ONE_MS_TASK_NAME_SAP;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_1ms_SAP.priority = 7;//2;
taskParams_1ms_SAP.stack = ApplicationTask1ms_TaskStack_SAP;
taskParams_1ms_SAP.stackSize = sizeof (ApplicationTask1ms_TaskStack_SAP);
task = Task_create(ApplicationTask1ms_TaskFunction_SAP, &taskParams_1ms_SAP, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
#endif
/* Initialize the 5ms application and BSW task parameters*/
Task_Params_init(&taskParams_1ms_CAN);
taskParams_1ms_CAN.instance->name = ONE_MS_TASK_NAME_CAN;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_1ms_CAN.priority = 6;//2;
taskParams_1ms_CAN.stack = ApplicationTask1ms_TaskStack_CAN;
taskParams_1ms_CAN.stackSize = sizeof (ApplicationTask1ms_TaskStack_CAN);
task = Task_create(ApplicationTask1ms_TaskFunction_CAN, &taskParams_1ms_CAN, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
#if 0
/* Initialize the 5ms application and BSW task parameters*/
Task_Params_init(&taskParams_5ms);
taskParams_5ms.instance->name = FIVE_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_5ms.priority = 7;//2;
taskParams_5ms.stack = ApplicationTask5ms_TaskStack;
taskParams_5ms.stackSize = sizeof (ApplicationTask5ms_TaskStack);
task = Task_create(ApplicationTask5ms_TaskFunction, &taskParams_5ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
/* Initialize the 10ms application and BSW task parameters*/
Task_Params_init(&taskParams_10ms);
taskParams_10ms.instance->name = TEN_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_10ms.priority = 8;//3;
taskParams_10ms.stack = ApplicationTask10ms_TaskStack;
taskParams_10ms.stackSize = sizeof (ApplicationTask10ms_TaskStack);
task = Task_create(ApplicationTask10ms_TaskFunction, &taskParams_10ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
/* Initialize the 50ms application and BSW task parameters*/
Task_Params_init(&taskParams_50ms);
taskParams_50ms.instance->name = FIFTY_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_50ms.priority = 9;//4;
taskParams_50ms.stack = ApplicationTask50ms_TaskStack;
taskParams_50ms.stackSize = sizeof (ApplicationTask50ms_TaskStack);
task = Task_create(ApplicationTask50ms_TaskFunction, &taskParams_50ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
/* Initialize the 100ms application and BSW task parameters*/
Task_Params_init(&taskParams_100ms);
taskParams_100ms.instance->name = HUNDRED_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_100ms.priority = 10;//5;
taskParams_100ms.stack = ApplicationTask100ms_TaskStack;
taskParams_100ms.stackSize = sizeof (ApplicationTask100ms_TaskStack);
task = Task_create(ApplicationTask100ms_TaskFunction, &taskParams_100ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
/* Initialize the 100ms application and BSW task parameters*/
Task_Params_init(&taskParams_60ms);
taskParams_60ms.instance->name = SIXTY_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_60ms.priority = 10;//5;
taskParams_60ms.stack = ApplicationTask60ms_TaskStack;
taskParams_60ms.stackSize = sizeof (ApplicationTask60ms_TaskStack);
task = Task_create(ApplicationTask60ms_TaskFunction, &taskParams_60ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
/* Initialize the 200ms application and BSW task parameters*/
Task_Params_init(&taskParams_200ms);
taskParams_200ms.instance->name = TWOHUNDRED_MS_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
/*Set priority*/
taskParams_200ms.priority = 10;//5;
taskParams_200ms.stack = ApplicationTask200ms_TaskStack;
taskParams_200ms.stackSize = sizeof (ApplicationTask200ms_TaskStack);
task = Task_create(ApplicationTask200ms_TaskFunction, &taskParams_200ms, &eb);
if(NULL == task)
{
BIOS_exit(0);
}
#endif
BIOS_start(); /* does not return */
return(0);
}
static Void ApplicationTask5ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(FIVE_MS_TIMEOUT);
}
}
static Void ApplicationTask1ms_TaskFunction_CAN(UArg a0, UArg a1)
{
float start,end,t_ms=0;
static float t1_min=1000;
static float t1_max=0;
static uint16 printcnt=0;
AppUtils_Printf(MSG_NORMAL, "test multislot_2 \r\n");
while(INFINITE)
{
/*CAN Driver periodic Tx function*/
Can_MainFunction_Write();
/*CAN Driver periodic Rx function*/
Can_MainFunction_Read();
/*CAN Driver periodic mode change function*/
Can_MainFunction_Mode();
/*IPDU Multiplexer periodic Rx function*/
IpduM_MainFunctionRx();
/*COM periodic Rx function*/
Com_MainFunctionRx();
/*COM periodic Tx function*/
Com_MainFunctionTx();
//start=TimerP_getTimeInUsecs();
/*
end=TimerP_getTimeInUsecs();
t_ms = (end - start)/1000;
if(t_ms> t1_max)
{
t1_max = t_ms;
}
if(t_ms < t1_min)
{
t1_min = t_ms;
}
*/
SAPJI2019SV1();
/*SystemSignalAdapter swc CAN signal read function.
Reads perception and vehicle CAN signal with 5ms periodicity*/
swc_SystemSignalAdapter_readtask_5ms();
/*SystemSignalAdapter swc CAN signal write function.
Sends perception and vehicle CAN signal with 5ms periodicity*/
swc_SystemSignalAdapter_writetask_5ms();
// Task_Periodicity(ONE_MS_TIMEOUT);
}
}
static Void ApplicationTask1ms_TaskFunction_SAP(UArg a0, UArg a1)
{
{
Task_Periodicity(ONE_MS_TIMEOUT);
}
}
static Void ApplicationTask60ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(SIXTY_MS_TIMEOUT);
}
}
static Void ApplicationTask10ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(TEN_MS_TIMEOUT);
}
}
static Void ApplicationTask50ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(FIFTY_MS_TIMEOUT);
}
}
static Void ApplicationTask100ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(HUNDRED_MS_TIMEOUT);
}
}
static Void ApplicationTask200ms_TaskFunction(UArg a0, UArg a1)
{
while(INFINITE)
{
Task_Periodicity(TWOHUNDRED_MS_TIMEOUT);
}
}
sint32 SetupSciServer(void)
{
sint32 ret = CSL_PASS;
#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200)))
Sciserver_TirtosCfgPrms_t appPrms;
Sciclient_ConfigPrms_t clientPrms;
appPrms.taskPriority[SCISERVER_TASK_USER_LO] = 1;
appPrms.taskPriority[SCISERVER_TASK_USER_HI] = 4;
/* Sciclient needs to be initialized before Sciserver. Sciserver depends on
* Sciclient API to execute message forwarding */
ret = Sciclient_configPrmsInit(&clientPrms);
if (ret == CSL_PASS)
{
ret = Sciclient_init(&clientPrms);
}
if (ret == CSL_PASS)
{
ret = Sciserver_tirtosInit(&appPrms);
}
if (ret == CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, "Starting Sciserver..... PASSED\n");
}
else
{
AppUtils_Printf(MSG_NORMAL, "Starting Sciserver..... FAILED\n");
}
#endif
return ret;
}
static void Initialise_Bsw(void)
{
Std_ReturnType ret;
uint8 IpduGroup_Vector[1];
IpduGroup_Vector[0] = 0xFF;
CanIf_Init();
ret = CanIf_SetControllerMode(0U, CAN_CS_STARTED);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to start the CAN0 Driver\n");
}
ret = CanIf_SetControllerMode(1U, CAN_CS_STARTED);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to start the CAN1 Driver\n");
}
ret = CanIf_SetPduMode(0U, CANIF_ONLINE);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to set the PDU mode Controller 0\n");
}
ret = CanIf_SetPduMode(1U, CANIF_ONLINE);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to set the PDU mode Controller 1\n");
}
PduR_Init();
IpduM_Init();
Com_Init();
//COM_PDUGRPVECTOR_ARRAYSIZE
Com_IpduGroupControl(IpduGroup_Vector,TRUE);
// AP_Function_Component_Frame();
}
static void Task_Periodicity(uint32 usec)
{
uint32 timeout;
/* usec must be less than 1000000
if (usec >= 1000000) {
errno = EINVAL;
return (-1);
}*/
/* Implementations may place limitations on the granularity of timer
* values. For each interval timer, if the requested timer value requires
* a finer granularity than the implementation supports, the actual timer
* value shall be rounded up to the next supported value.
*/
AppUtils_Printf("Clock_tickPeriod = %d \n",Clock_tickPeriod);
/* Clock_tickPeriod is the Clock period in microseconds */
timeout = (uint32)((usec + Clock_tickPeriod - 1) / Clock_tickPeriod);
AppUtils_Printf("timout = %d \n",timeout);
/* must add one tick to ensure a full duration of timeout ticks */
Task_sleep(timeout);
}#our Freetos main file-
:
/*
*
* Copyright (c) 2019-2020 Texas Instruments Incorporated
*
* All rights reserved not granted herein.
*
* Limited License.
*
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein. With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
* Redistributions must preserve existing copyright notices and reproduce this license
* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
* with the distribution
*
* Redistribution and use in binary form, without modification, are permitted provided
* that the following conditions are met:
*
* * No reverse engineering, decompilation, or disassembly of this software is
* permitted with respect to any software provided in binary form.
*
* * any redistribution and use are licensed by TI for use only with TI Devices.
*
* * Nothing shall obligate TI to provide you with source code for the software
* licensed and provided to you in object code.
*
* If software source code is provided to you, modification and redistribution of the
* source code are permitted provided that the following conditions are met:
*
* * any redistribution and use of the source code, including any resulting derivative
* works, are licensed by TI for use only with TI Devices.
*
* * any redistribution and use of any object code compiled from the source code
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
*
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
*
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* DISCLAIMER.
*
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* \file can_profile.h.c
*
* \brief Main file for TI-RTOS build
*/
/* ========================================================================== */
/* Include Files */
/* ========================================================================== */
#include <ti/csl/arch/csl_arch.h>
#include <ti/csl/soc.h>
#include <ti/csl/cslr.h>
#include <ti/csl/tistdtypes.h>
#include <ti/osal/osal.h>
#include <ti/osal/TaskP.h>
#include "CanApp_Startup.h"
#include "can_profile.h"
#include "CanIf.h"
#include "Can.h"
#include "Com.h"
#include "PduR.h"
#include "CanIf.h"
#include "IpduM.h"
#include "AP_Function_Component.h"
#include "AP_JI2019_StradVision.h"
#include "AP_Generic_Perception_Interface_100ms.h"
#include "AP_ADAS_Generic_Interface_10ms.h"
#include "AP_Generic_Perception_Interface_5ms.h"
#include "VizAD_AP_Interface_100ms.h"
#include "SensorFusion.h"
#include "ParkingSpaceFiltering.h"
#include "AP_ADAS_Generic_Interface_Types.h"
#include "swc_SystemSignalAdapter_main.h"
#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200)))
#include <ti/drv/sciclient/sciserver_tirtos.h>
#endif
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */
/* Test application stack size */
#define APP_TASK_STACK (512U * 1024U)
//#define APP_TASK_STACK (10U * 1024U)
/**< Stack required for the stack */
#define CAN_PROFILE_DEMO_TASK_NAME ("CAN PROFILE")
/**< Task name */
/* Clock_tickPeriod is in units of usecs */
#define ONE_MS_TIMEOUT (uint32)1000
#define INFINITE (1U)
/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
/* None */
/* ==========================================================================*/
/* Function Declarations */
/* ========================================================================== */
static void CanApp_TaskFxn(void* a0, void* a1);
//static void CanApp_Shutdown(void);
sint32 SetupSciServer(void);
/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */
/* application stack */
static uint8_t CanApp_TaskStack[APP_TASK_STACK] __attribute__((aligned(32)));
/**< Stack for the task */
static canAppTaskObj_t CanApp_TestPrms;
/**< Test parameters */
static HwiP_Handle CanApp_IsrHndls[CAN_MAX_CONTROLLER];
/**< Stores the ISR handles */
extern SemaphoreP_Handle CanIf_TxConfirmationSemaphore;
/**< TX Confirmation semaphore, would be posted when TX completes */
extern SemaphoreP_Handle CanIf_RxConfirmationSemaphore;
/**< Rx Confirmation semaphore, would be posted when TX completes */
/* ========================================================================== */
/* External Variables */
/* ========================================================================== */
extern uint32 CanIf_DrvStatus;
/**< CAN IF Driver Status, defined in CanIf.c */
/* ========================================================================== */
/* Function Definitions */
/* ========================================================================== */
int main(void)
{
TaskP_Handle task;
TaskP_Params taskParams;
sint32 ret = CSL_PASS;
uint8 IpduGroup_Vector[1];
IpduGroup_Vector[0] = 0xFF;
OS_init();
AppUtils_Init();
/* Initialize SCI Client Server */
ret = SetupSciServer();
if(ret != CSL_PASS)
{
OS_stop();
}
CanApp_Startup();
CanApp_PowerAndClkSrc();
CanApp_PlatformInit();
/* Initialize dummy CAN IF */
CanIf_Init();
ret = CanIf_SetControllerMode(0U, CAN_CS_STARTED);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to start the CAN0 Driver\n");
}
ret = CanIf_SetControllerMode(1U, CAN_CS_STARTED);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to start the CAN1 Driver\n");
}
ret = CanIf_SetPduMode(0U, CANIF_ONLINE);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to set the PDU mode Controller 0\n");
}
ret = CanIf_SetPduMode(1U, CANIF_ONLINE);
if(E_OK != ret)
{
AppUtils_Printf(MSG_NORMAL, "Failed to set the PDU mode Controller 1\n");
}
PduR_Init();
IpduM_Init();
Com_Init();
//COM_PDUGRPVECTOR_ARRAYSIZE
Com_IpduGroupControl(IpduGroup_Vector,TRUE);
/* Initialize the task params */
TaskP_Params_init(&taskParams);
//taskParams.instance->name = CAN_PROFILE_DEMO_TASK_NAME;
/* Set the task priority higher than the default priority (1) */
taskParams.priority = 2;
taskParams.stack = CanApp_TaskStack;
taskParams.stacksize = sizeof (CanApp_TaskStack);
task = TaskP_create(CanApp_TaskFxn, &taskParams);
if(NULL == task)
{
OS_stop();
}
OS_start(); /* does not return */
return(0);
}
static void CanApp_TaskFxn(void* a0, void* a1)
{
AppUtils_Printf(MSG_NORMAL, "TEST SSA TX msgs\n");
while(INFINITE)
{
/*CAN Driver periodic Tx function*/
Can_MainFunction_Write();
/*CAN Driver periodic Rx function*/
Can_MainFunction_Read();
/*CAN Driver periodic mode change function*/
Can_MainFunction_Mode();
/*IPDU Multiplexer periodic Rx function*/
IpduM_MainFunctionRx();
/*COM periodic Rx function*/
Com_MainFunctionRx();
/*COM periodic Tx function*/
Com_MainFunctionTx();
SAPJI2019SV1();
/*SystemSignalAdapter swc CAN signal read function.
Reads perception and vehicle CAN signal with 5ms periodicity*/
swc_SystemSignalAdapter_readtask_5ms();
/*SystemSignalAdapter swc CAN signal write function.
Sends perception and vehicle CAN signal with 5ms periodicity*/
swc_SystemSignalAdapter_writetask_5ms();
}
return;
}
/*
// \brief Application tear down functions
static void CanApp_Shutdown(void)
{
uint32 idx;
for (idx = 0U; idx < CAN_MAX_CONTROLLER; idx++)
{
if (NULL != CanApp_IsrHndls[idx])
{
if (HwiP_OK != HwiP_delete(CanApp_IsrHndls[idx]))
{
AppUtils_Printf(MSG_NORMAL, MSG_APP_NAME
" Error!!! Could not De register"
" the ISR for instance %d!!!\n", idx);
break;
}
}
}
if (NULL != CanIf_TxConfirmationSemaphore)
{
SemaphoreP_delete(CanIf_TxConfirmationSemaphore);
if (NULL != CanIf_RxConfirmationSemaphore)
{
SemaphoreP_delete(CanIf_RxConfirmationSemaphore);
}
}
return;
}
*/
sint32 SetupSciServer(void)
{
sint32 ret = CSL_PASS;
#if (defined (BUILD_MCU1_0) && (defined (SOC_J721E) || defined (SOC_J7200)))
Sciserver_TirtosCfgPrms_t appPrms;
Sciclient_ConfigPrms_t clientPrms;
appPrms.taskPriority[SCISERVER_TASK_USER_LO] = 1;
appPrms.taskPriority[SCISERVER_TASK_USER_HI] = 4;
/* Sciclient needs to be initialized before Sciserver. Sciserver depends on
* Sciclient API to execute message forwarding */
ret = Sciclient_configPrmsInit(&clientPrms);
if (ret == CSL_PASS)
{
ret = Sciclient_init(&clientPrms);
}
if (ret == CSL_PASS)
{
ret = Sciserver_tirtosInit(&appPrms);
}
if (ret == CSL_PASS)
{
AppUtils_Printf(MSG_NORMAL, "Starting Sciserver..... PASSED\n");
}
else
{
AppUtils_Printf(MSG_NORMAL, "Starting Sciserver..... FAILED\n");
}
#endif
return ret;
}
Hi,
Can you please share the linker files for your application from both the SDK?
Regards,
Parth
Hi Parth,
#our tirtos app where we are using ddr memory
/*----------------------------------------------------------------------------*/
/* File: linker_r5f_mcu1_0_btcm_sysbios.lds */
/* Description: */
/* Link command file for J7ES MCU1_0 view */
/* TI ARM Compiler version 15.12.3 LTS or later */
/* */
/* (c) Texas Instruments 2018, All rights reserved. */
/*----------------------------------------------------------------------------*/
/* History: */
/* Aug 26th, 2016 Original version .......................... Loc Truong */
/* Aug 01th, 2017 new TCM mem map .......................... Loc Truong */
/* Nov 07th, 2017 Changes for R5F Init Code.................. Vivek Dhande */
/* Sep 17th, 2018 Added DDR sections for IPC................. J. Bergsagel */
/* Sep 26th, 2018 Extra mem sections for IPC resource table.. J. Bergsagel */
/* Nov 06th, 2018 Correction to TCM addresses for MCU1_0..... J. Bergsagel */
/* Nov 07th, 2018 Split up OCMRAM_MCU for split-mode R5Fs.... J. Bergsagel */
/* Feb 20th, 2019 Use R5F BTCM memory for boot vectors........J. Bergsagel */
/* Apr 23th, 2019 Changes for R5F startup Code............... Vivek Dhande */
/*----------------------------------------------------------------------------*/
/* Linker Settings */
/* Standard linker options */
--retain="*(.bootCode)"
--retain="*(.startupCode)"
--retain="*(.startupData)"
--fill_value=0
--stack_size=0xC0000
--heap_size=0x1000
-stack 0xC0000 //org 0x2000 /* SOFTWARE STACK SIZE */
-heap 0x2000 //org 0x2000 /* HEAP AREA SIZE */
--define FILL_PATTERN=0xFEAA55EF
--define FILL_LENGTH=0x100
/*#define DDR0_ALLOCATED_START 0xA0000000---original*/
#define DDR0_ALLOCATED_START 0xA0000000
#define MCU1_0_EXT_DATA_BASE (DDR0_ALLOCATED_START + 0x00100000)
#define MCU1_0_R5F_MEM_TEXT_BASE (DDR0_ALLOCATED_START + 0x00200000)
#define MCU1_0_R5F_MEM_DATA_BASE (DDR0_ALLOCATED_START + 0x00300000)
#define MCU1_0_DDR_SPACE_BASE (DDR0_ALLOCATED_START + 0x00400000)
#define MCU1_1_ALLOCATED_START DDR0_ALLOCATED_START + 0x01000000
#define MCU1_1_EXT_DATA_BASE (MCU1_1_ALLOCATED_START + 0x00100000)
#define MCU1_1_R5F_MEM_TEXT_BASE (MCU1_1_ALLOCATED_START + 0x00200000)
#define MCU1_1_R5F_MEM_DATA_BASE (MCU1_1_ALLOCATED_START + 0x00300000)
#define MCU1_1_DDR_SPACE_BASE (MCU1_1_ALLOCATED_START + 0x00400000)
#define MCU2_0_ALLOCATED_START DDR0_ALLOCATED_START + 0x02000000
#define MCU2_0_EXT_DATA_BASE (MCU2_0_ALLOCATED_START + 0x00100000)
#define MCU2_0_R5F_MEM_TEXT_BASE (MCU2_0_ALLOCATED_START + 0x00200000)
#define MCU2_0_R5F_MEM_DATA_BASE (MCU2_0_ALLOCATED_START + 0x00300000)
#define MCU2_0_DDR_SPACE_BASE (MCU2_0_ALLOCATED_START + 0x00400000)
#define MCU2_1_ALLOCATED_START DDR0_ALLOCATED_START + 0x03000000
#define MCU2_1_EXT_DATA_BASE (MCU2_1_ALLOCATED_START + 0x00100000)
#define MCU2_1_R5F_MEM_TEXT_BASE (MCU2_1_ALLOCATED_START + 0x00200000)
#define MCU2_1_R5F_MEM_DATA_BASE (MCU2_1_ALLOCATED_START + 0x00300000)
#define MCU2_1_DDR_SPACE_BASE (MCU2_1_ALLOCATED_START + 0x00400000)
#define ATCM_START 0x00000000
#define BTCM_START 0x41010000
-e __VECS_ENTRY_POINT
//--retain="*(.intvecs)"
//--retain="*(.intc_text)"
//--retain="*(.rstvectors)"
--retain="*(.utilsCopyVecsToAtcm)"
/*----------------------------------------------------------------------------*/
/* Memory Map */
MEMORY
{
/* MCU1_R5F_0 local view */
MCU_ATCM (RWX) : origin=ATCM_START length=0x8000
/* MCU1_R5F0_TCMB0 (RWIX) : origin=BTCM_START length=0x8000 (documented only, to void conflict below) */
/* MCU1_R5F_0 SoC view */
MCU1_R5F0_ATCM (RWIX) : origin=0x41000000 length=0x8000
MCU1_R5F0_BTCM_VECS (RWIX) : origin=0x41010000 length=0x0100
MCU1_R5F0_BTCM (RWIX) : origin=0x41010100 length=0x7F00
DDR0_RESERVED (RWIX) : origin=0x80000000 length=0x20000000 /* 512MB */
MCU1_0_IPC_DATA (RWIX) : origin=DDR0_ALLOCATED_START length=0x00100000 /* 1MB */
MCU1_0_EXT_DATA (RWIX) : origin=MCU1_0_EXT_DATA_BASE length=0x00100000 /* 1MB */
MCU1_0_R5F_MEM_TEXT (RWIX) : origin=MCU1_0_R5F_MEM_TEXT_BASE length=0x00100000 /* 1MB */
MCU1_0_R5F_MEM_DATA (RWIX) : origin=MCU1_0_R5F_MEM_DATA_BASE length=0x00100000 /* 1MB */
MCU1_0_DDR_SPACE (RWIX) : origin=MCU1_0_DDR_SPACE_BASE length=0x00C00000 /* 12MB */
MCU1_1_IPC_DATA (RWIX) : origin=MCU1_1_ALLOCATED_START length=0x00100000 /* 1MB */
MCU1_1_EXT_DATA (RWIX) : origin=MCU1_1_EXT_DATA_BASE length=0x00100000 /* 1MB */
MCU1_1_R5F_MEM_TEXT (RWIX) : origin=MCU1_1_R5F_MEM_TEXT_BASE length=0x00100000 /* 1MB */
MCU1_1_R5F_MEM_DATA (RWIX) : origin=MCU1_1_R5F_MEM_DATA_BASE length=0x00100000 /* 1MB */
MCU1_1_DDR_SPACE (RWIX) : origin=MCU1_1_DDR_SPACE_BASE length=0x00C00000 /* 12MB */
MCU2_0_IPC_DATA (RWIX) : origin=MCU2_0_ALLOCATED_START length=0x00100000 /* 1MB */
MCU2_0_EXT_DATA (RWIX) : origin=MCU2_0_EXT_DATA_BASE length=0x00100000 /* 1MB */
MCU2_0_R5F_MEM_TEXT (RWIX) : origin=MCU2_0_R5F_MEM_TEXT_BASE length=0x00100000 /* 1MB */
MCU2_0_R5F_MEM_DATA (RWIX) : origin=MCU2_0_R5F_MEM_DATA_BASE length=0x00100000 /* 1MB */
MCU2_0_DDR_SPACE (RWIX) : origin=MCU2_0_DDR_SPACE_BASE length=0x00C00000 /* 12MB */
MCU2_1_IPC_DATA (RWIX) : origin=MCU2_1_ALLOCATED_START length=0x00100000 /* 1MB */
MCU2_1_EXT_DATA (RWIX) : origin=MCU2_1_EXT_DATA_BASE length=0x00100000 /* 1MB */
MCU2_1_R5F_MEM_TEXT (RWIX) : origin=MCU2_1_R5F_MEM_TEXT_BASE length=0x00100000 /* 1MB */
MCU2_1_R5F_MEM_DATA (RWIX) : origin=MCU2_1_R5F_MEM_DATA_BASE length=0x00100000 /* 1MB */
MCU2_1_DDR_SPACE (RWIX) : origin=MCU2_1_DDR_SPACE_BASE length=0x00C00000 /* 12MB */
SHARED_DDR_SPACE (RWIX) : origin=0xAA000000 length=0x01C00000 /* 28MB */
// SHARED_DDR_SPACE (RWIX) : origin=0xB8000000 length=0x01C00000 --test /* 28MB */
} /* end of MEMORY */
/*----------------------------------------------------------------------------*/
/* Section Configuration */
SECTIONS
{
.vecs : {
*(.vecs)
} palign(8) > BTCM_START
.vecs : {
__VECS_ENTRY_POINT = .;
} > MCU1_R5F0_BTCM_VECS
xdc.meta (COPY): { *(xdc.meta) } > MCU1_R5F0_BTCM
.init_text : {
boot.*(.text)
*(.text:ti_sysbios_family_arm_MPU_*)
*(.text:ti_sysbios_family_arm_v7r_Cache_*)
} palign(8) > MCU1_R5F0_BTCM
.text:xdc_runtime_Startup_reset__I : {} palign(8) > MCU1_R5F0_BTCM
.bootCode : {} palign(8) > MCU1_R5F0_BTCM
.startupCode : {} palign(8) > MCU1_R5F0_BTCM
.startupData : {} palign(8) > MCU1_R5F0_BTCM, type = NOINIT
.utilsCopyVecsToAtcm : {} palign(8) > MCU1_R5F0_BTCM
.text : {} palign(8) > MCU1_0_DDR_SPACE
.const : {} palign(8) > MCU1_0_DDR_SPACE
.cinit : {} palign(8) > MCU1_0_DDR_SPACE
.pinit : {} palign(8) > MCU1_0_DDR_SPACE
.bss : {} align(4) > MCU1_0_DDR_SPACE
.data : {} palign(128) > MCU1_0_DDR_SPACE
.data_buffer: {} palign(128) > MCU1_0_DDR_SPACE
.sysmem : {} > MCU1_0_DDR_SPACE
.stack : {} align(4) > MCU1_0_DDR_SPACE
.resource_table : {
__RESOURCE_TABLE = .;
} > MCU1_0_EXT_DATA
.tracebuf : {} > MCU1_0_EXT_DATA
.const.devgroup.MCU_WAKEUP : {} align(4) > MCU1_0_DDR_SPACE
.const.devgroup.MAIN : {} align(4) > MCU1_0_DDR_SPACE
.const.devgroup.DMSC_INTERNAL : {} align(4) > MCU1_0_DDR_SPACE
.bss.devgroup.MAIN : {} align(4) > MCU1_0_DDR_SPACE
.bss.devgroup.MCU_WAKEUP : {} align(4) > MCU1_0_DDR_SPACE
.bss.devgroup.DMSC_INTERNAL : {} align(4) > MCU1_0_DDR_SPACE
.boardcfg_data : {} align(4) > MCU1_0_DDR_SPACE
.bss.devgroup* : {} align(4) > MCU1_0_DDR_SPACE
.const.devgroup* : {} align(4) > MCU1_0_DDR_SPACE
/*----------------------------------------------------------------------------*/
/* Misc linker settings */
/* Additional sections settings */
McalTextSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
{
.=align(4);
__linker_can_text_start = .;
. += FILL_LENGTH;
*(CAN_TEXT_SECTION)
*(CAN_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_text_end = .;
.=align(4);
__linker_dio_text_start = .;
. += FILL_LENGTH;
*(DIO_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_text_end = .;
}
McalConstSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
{
.=align(4);
__linker_can_const_start = .;
. += FILL_LENGTH;
*(CAN_CONST_8_SECTION)
*(CAN_CONST_32_SECTION)
*(CAN_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_const_end = .;
.=align(4);
__linker_dio_const_start = .;
. += FILL_LENGTH;
*(DIO_CONST_32_SECTION)
*(DIO_CONST_UNSPECIFIED_SECTION)
*(DIO_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_const_end = .;
}
McalInitSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
{
.=align(4);
__linker_can_init_start = .;
. += FILL_LENGTH;
*(CAN_DATA_INIT_8_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_init_end = .;
}
McalNoInitSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE, type = NOINIT
{
.=align(4);
__linker_can_no_init_start = .;
. += FILL_LENGTH;
*(CAN_DATA_NO_INIT_UNSPECIFIED_SECTION)
*(CAN_DATA_NO_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_no_init_end = .;
}
/* Example Utility specifics */
UtilityNoInitSection : align=4, load > MCU1_0_DDR_SPACE, type = NOINIT
{
.=align(4);
__linker_utility_no_init_start = .;
. += FILL_LENGTH;
*(EG_TEST_RESULT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_utility_no_init_end = .;
}
} /* end of SECTIONS */
/*-------------------------------- END ---------------------------------------*/
#our freertos app where we are using MSMC3
/*==========================*/
/* Linker Settings */
/*==========================*/
--retain="*(.bootCode)"
--retain="*(.startupCode)"
--retain="*(.startupData)"
--retain="*(.irqStack)"
--retain="*(.fiqStack)"
--retain="*(.abortStack)"
--retain="*(.undStack)"
--retain="*(.svcStack)"
--fill_value=0
//--stack_size=0x4000 org values
//--heap_size=0x8000
//memory extended
--stack_size=0xC0000
--heap_size=0x2000
--entry_point=_freertosresetvectors
//-stack 0x4000 /* SOFTWARE STACK SIZE */
-stack 0xC0000 /* SOFTWARE STACK SIZE */
//-heap 0x8000 /* HEAP AREA SIZE */
-heap 0x2000 /* HEAP AREA SIZE */
/*-------------------------------------------*/
/* Stack Sizes for various modes */
/*-------------------------------------------*/
__IRQ_STACK_SIZE = 0x1000;
__FIQ_STACK_SIZE = 0x0100;
__ABORT_STACK_SIZE = 0x0100;
__UND_STACK_SIZE = 0x0100;
__SVC_STACK_SIZE = 0x0100;
/*--------------------------------------------------------------------------*/
/* Memory Map */
/*--------------------------------------------------------------------------*/
--define FILL_PATTERN=0xFEAA55EF
--define FILL_LENGTH=0x100
MEMORY
{
// VECTORS (X) : ORIGIN = 0x00000000 LENGTH = 0x00000040
/*=================== MCU0_R5F_0 Local View ========================*/
// MCU0_R5F_TCMA (X) : ORIGIN = 0x00000040 LENGTH = 0x00007FC0
// MCU0_R5F_TCMB0 (RWIX) : ORIGIN = 0x41010000 LENGTH = 0x00008000
MCU_R5F_TCMA_VECS (X) : ORIGIN = 0x00000000 LENGTH = 0x00000040
MCU_R5F_TCMA (X) : ORIGIN = 0x00000040 LENGTH = 0x00007FC0
MCU_R5F_TCMB_VECS (X) : ORIGIN = 0x41010000 LENGTH = 0x00000040
MCU_R5F_TCMB (X) : ORIGIN = 0x41010040 LENGTH = 0x00007FC0
/*==================== MCU0_R5F_1 SoC View =========================*/
MCU0_R5F1_ATCM (RWIX) : ORIGIN = 0x41400000 LENGTH = 0x00008000
MCU0_R5F1_BTCM (RWIX) : ORIGIN = 0x41410000 LENGTH = 0x00008000
/*========================J721E MCMS3 LOCATIONS ===================*/
/*---------- J721E Reserved Memory for ARM Trusted Firmware -------*/
MSMC3_ARM_FW (RWIX) : ORIGIN = 0x70000000 LENGTH = 0x00040000 /* 256KB */
MSMC3 (RWIX) : ORIGIN = 0x70040000 LENGTH = 0x007B0000 /* 8MB - 320KB */
/*------------- J721E Reserved Memory for DMSC Firmware -----------*/
MSMC3_DMSC_FW (RWIX) : ORIGIN = 0x707F0000 LENGTH = 0x00010000 /* 64KB */
// DDR0 (RWIX) : origin=0x80000000 length=0x8000000 /* 2GB */
/* Used in this file */
// DDR0_MCU_1_0 (RWIX) : origin=0x97000000 length=0x1000000 /* 16MB */
DDR0_MCU_1_0_RSC_TBL (RWIX) : origin=0xA0100000 length=0x100000 /* 1MB */
DDR0_MCU_1_0 (RWIX) : origin=0xA0200000 length=0xE00000 /* 14MB */
/* Refer the user guide for details on persistence of these sections */
OCMC_RAM_BOARD_CFG (RWIX) : origin=0x41C80000 length=0x2000
//memory extended for code to fit in
OCMC_RAM_SCISERVER (RWIX) : origin=0x41C82000 length=0x64000
OCMC_RAM (RWIX) : origin=0x41CE6000 length=0x1BB00
OCMC_RAM_X509_HEADER (RWIX) : origin=0x41DFFB00 length=0x500
// OCMC_RAM_SCISERVER (RWIX) : origin=0x41C82000 length=0x60000
// OCMC_RAM (RWIX) : origin=0x41CE2000 length=0x1DB00
//OCMC_RAM_X509_HEADER (RWIX) : origin=0x41CFFB00 length=0x500
} /* end of MEMORY */
/*----------------------------------------------------------------------------*/
/* Section Configuration */
SECTIONS
{
/*.freertosrstvectors : {} palign(8) > VECTORS
.bootCode : {} palign(8) > OCMC_RAM
.startupCode : {} palign(8) > OCMC_RAM
.startupData : {} palign(8) > OCMC_RAM, type = NOINIT
.text : {} palign(8) > OCMC_RAM_SCISERVER*/
.freertosrstvectors : {} palign(8) > MCU_R5F_TCMB_VECS
.bootCode : {} palign(8) > MCU_R5F_TCMB
.startupCode : {} palign(8) > MCU_R5F_TCMB
.startupData : {} palign(8) > MCU_R5F_TCMB, type = NOINIT
GROUP {
.text.hwi : palign(8)
.text.cache : palign(8)
.text.mpu : palign(8)
.text.boot : palign(8)
// } > OCMC_RAM_SCISERVER
} > MCU_R5F_TCMB
.text : {} palign(8) > MSMC3
.const : {} palign(8) > MSMC3
.rodata : {} palign(8) > MSMC3
.cinit : {} palign(8) > OCMC_RAM
.pinit : {} palign(8) > OCMC_RAM
/* For NDK packet memory, we need to map this sections before .bss*/
.bss:NDK_MMBUFFER (NOLOAD) {} ALIGN (128) > OCMC_RAM_SCISERVER
.bss:NDK_PACKETMEM (NOLOAD) {} ALIGN (128) > OCMC_RAM_SCISERVER
.bss : {} align(4) > MSMC3
.far : {} align(4) > MSMC3
.data : {} palign(128) > MSMC3
.data_buffer: {} palign(128) > MSMC3
.sysmem : {} > MSMC3
.stack : {} align(4) > MSMC3 (HIGH) fill=FILL_PATTERN
.bss.devgroup* : {} align(4) > MSMC3
.const.devgroup*: {} align(4) > MSMC3
.data_user : {} align(4) > OCMC_RAM_SCISERVER
.boardcfg_data : {} align(4) > OCMC_RAM_SCISERVER
/* USB or any other LLD buffer for benchmarking */
.benchmark_buffer (NOLOAD) {} ALIGN (8) > OCMC_RAM_SCISERVER
.irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > MSMC3(HIGH)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > MSMC3(HIGH)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > MSMC3(HIGH)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undStack : {. = . + __UND_STACK_SIZE;} align(4) > MSMC3(HIGH)
RUN_START(__UND_STACK_START)
RUN_END(__UND_STACK_END)
.svcStack : {. = . + __SVC_STACK_SIZE;} align(4) > MSMC3(HIGH)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
/* Additional sections settings */
McalTextSection : fill=FILL_PATTERN, align=4, load > DDR0_MCU_1_0
{
.=align(4);
__linker_spi_text_start = .;
. += FILL_LENGTH;
*(SPI_TEXT_SECTION)
*(SPI_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_spi_text_end = .;
.=align(4);
__linker_gpt_text_start = .;
. += FILL_LENGTH;
*(GPT_TEXT_SECTION)
*(GPT_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_gpt_text_end = .;
.=align(4);
__linker_dio_text_start = .;
. += FILL_LENGTH;
*(DIO_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_text_end = .;
.=align(4);
__linker_eth_text_start = .;
. += FILL_LENGTH;
*(ETH_TEXT_SECTION)
*(ETH_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_eth_text_end = .;
.=align(4);
__linker_ethtrcv_text_start = .;
. += FILL_LENGTH;
*(ETHTRCV_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_ethtrcv_text_end = .;
.=align(4);
__linker_can_text_start = .;
. += FILL_LENGTH;
*(CAN_TEXT_SECTION)
*(CAN_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_text_end = .;
.=align(4);
__linker_wdg_text_start = .;
. += FILL_LENGTH;
*(WDG_TEXT_SECTION)
*(WDG_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_wdg_text_end = .;
.=align(4);
__linker_pwm_text_start = .;
. += FILL_LENGTH;
*(PWM_TEXT_SECTION)
*(PWM_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_pwm_text_end = .;
__linker_adc_text_start = .;
. += FILL_LENGTH;
*(ADC_TEXT_SECTION)
*(ADC_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_adc_text_end = .;
.=align(4);
__linker_cdd_ipc_text_start = .;
. += FILL_LENGTH;
*(CDD_IPC_TEXT_SECTION)
*(CDD_IPC_ISR_TEXT_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_cdd_ipc_text_end = .;
}
McalConstSection : fill=FILL_PATTERN, align=4, load > DDR0_MCU_1_0
{
.=align(4);
__linker_spi_const_start = .;
. += FILL_LENGTH;
*(SPI_CONST_32_SECTION)
*(SPI_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_spi_const_end = .;
.=align(4);
__linker_gpt_const_start = .;
. += FILL_LENGTH;
*(GPT_CONST_32_SECTION)
*(GPT_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_gpt_const_end = .;
.=align(4);
__linker_dio_const_start = .;
. += FILL_LENGTH;
*(DIO_CONST_32_SECTION)
*(DIO_CONST_UNSPECIFIED_SECTION)
*(DIO_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_const_end = .;
.=align(4);
__linker_can_const_start = .;
. += FILL_LENGTH;
*(CAN_CONST_8_SECTION)
*(CAN_CONST_32_SECTION)
*(CAN_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_const_end = .;
.=align(4);
__linker_eth_const_start = .;
. += FILL_LENGTH;
*(ETH_CONST_32_SECTION)
*(ETH_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_eth_const_end = .;
.=align(4);
__linker_ethtrcv_const_start = .;
. += FILL_LENGTH;
*(ETHTRCV_CONST_32_SECTION)
*(ETHTRCV_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_ethtrcv_const_end = .;
.=align(4);
__linker_wdg_const_start = .;
. += FILL_LENGTH;
*(WDG_CONST_32_SECTION)
*(WDG_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_wdg_const_end = .;
.=align(4);
__linker_pwm_const_start = .;
. += FILL_LENGTH;
*(PWM_CONST_32_SECTION)
*(PWM_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_pwm_const_end = .;
.=align(4);
__linker_adc_const_start = .;
. += FILL_LENGTH;
*(ADC_CONST_32_SECTION)
*(ADC_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_adc_const_end = .;
.=align(4);
__linker_cdd_ipc_const_start = .;
. += FILL_LENGTH;
*(CDD_IPC_CONST_32_SECTION)
*(CDD_IPC_CONFIG_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_cdd_ipc_const_end = .;
}
McalInitSection : fill=FILL_PATTERN, align=4, load > DDR0_MCU_1_0
{
.=align(4);
__linker_spi_init_start = .;
. += FILL_LENGTH;
*(SPI_DATA_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_spi_init_end = .;
.=align(4);
__linker_gpt_init_start = .;
. += FILL_LENGTH;
*(GPT_DATA_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_gpt_init_end = .;
.=align(4);
__linker_pwm_init_start = .;
. += FILL_LENGTH;
*(PWM_DATA_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_pwm_init_end = .;
.=align(4);
__linker_dio_init_start = .;
. += FILL_LENGTH;
*(DIO_DATA_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_init_end = .;
.=align(4);
__linker_eth_init_start = .;
. += FILL_LENGTH;
*(ETH_DATA_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_eth_init_end = .;
.=align(4);
__linker_ethtrcv_init_start = .;
. += FILL_LENGTH;
*(ETHTRCV_DATA_INIT_UNSPECIFIED_SECTION)
*(ETHTRCV_DATA_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_ethtrcv_init_end = .;
.=align(4);
__linker_can_init_start = .;
. += FILL_LENGTH;
*(CAN_DATA_INIT_8_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_init_end = .;
.=align(4);
__linker_wdg_init_start = .;
. += FILL_LENGTH;
*(WDG_DATA_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_wdg_init_end = .;
.=align(4);
__linker_adc_init_start = .;
. += FILL_LENGTH;
*(ADC_DATA_INIT_UNSPECIFIED_SECTION)
*(ADC_DATA_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_adc_init_end = .;
.=align(4);
__linker_cdd_ipc_init_start = .;
. += FILL_LENGTH;
*(CDD_IPC_DATA_INIT_UNSPECIFIED_SECTION)
*(CDD_IPC_DATA_INIT_32_SECTION)
*(CDD_IPC_DATA_INIT_8_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_cdd_ipc_init_end = .;
}
McalNoInitSection : fill=FILL_PATTERN, align=4, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(4);
__linker_spi_no_init_start = .;
. += FILL_LENGTH;
*(SPI_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_spi_no_init_end = .;
.=align(4);
__linker_gpt_no_init_start = .;
. += FILL_LENGTH;
*(GPT_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_gpt_no_init_end = .;
.=align(4);
__linker_dio_no_init_start = .;
. += FILL_LENGTH;
*(DIO_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_dio_no_init_end = .;
.=align(4);
__linker_eth_no_init_start = .;
. += FILL_LENGTH;
*(ETH_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_eth_no_init_end = .;
.=align(4);
__linker_ethtrcv_no_init_start = .;
. += FILL_LENGTH;
*(ETHTRCV_DATA_NO_INIT_UNSPECIFIED_SECTION)
*(ETHTRCV_DATA_NO_INIT_16_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_ethtrcv_no_init_end = .;
.=align(4);
__linker_can_no_init_start = .;
. += FILL_LENGTH;
*(CAN_DATA_NO_INIT_UNSPECIFIED_SECTION)
*(CAN_DATA_NO_INIT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_can_no_init_end = .;
.=align(4);
__linker_wdg_no_init_start = .;
. += FILL_LENGTH;
*(WDG_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_wdg_no_init_end = .;
.=align(4);
__linker_pwm_no_init_start = .;
. += FILL_LENGTH;
*(PWM_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_pwm_no_init_end = .;
__linker_adc_no_init_start = .;
. += FILL_LENGTH;
*(ADC_DATA_NO_INIT_UNSPECIFIED_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_adc_no_init_end = .;
__linker_cdd_ipc_no_init_start = .;
. += FILL_LENGTH;
*(CDD_IPC_DATA_NO_INIT_UNSPECIFIED_SECTION)
*(CDD_IPC_DATA_NO_INIT_8_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_cdd_ipc_no_init_end = .;
}
/* Example Utility specifics */
VariablesAlignedNoInitSection : align=8, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(8);
__linker_cdd_ipc_no_init_align_8b_start = .;
. += FILL_LENGTH;
*(CDD_IPC_DATA_NO_INIT_8_ALIGN_8B_SECTION)
.=align(8);
. += FILL_LENGTH;
__linker_cdd_ipc_no_init_align_8b_end = .;
}
/* Example Utility specifics */
UtilityNoInitSection : align=4, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(4);
__linker_utility_no_init_start = .;
. += FILL_LENGTH;
*(EG_TEST_RESULT_32_SECTION)
.=align(4);
. += FILL_LENGTH;
__linker_utility_no_init_end = .;
}
SciClientBoardCfgSection : align=128, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(128);
__linker_boardcfg_data_start = .;
. += FILL_LENGTH;
*(.boardcfg_data)
.=align(128);
. += FILL_LENGTH;
__linker_boardcfg_data_end = .;
}
/* This section is used for descs and ring mems. It's best to have
* it in OCMRAM or OCMC_RAM_SCISERVER */
McalUdmaSection : fill=FILL_PATTERN, align=128, load >OCMC_RAM_SCISERVER
{
.=align(128);
__linker_eth_udma_start = .;
. += FILL_LENGTH;
*(ETH_UDMA_SECTION)
.=align(128);
. += FILL_LENGTH;
__linker_eth_udma_end = .;
}
McalTxDataSection : fill=FILL_PATTERN, align=128, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(128);
__linker_eth_tx_data_start = .;
. += FILL_LENGTH;
*(ETH_TX_DATA_SECTION)
.=align(128);
. += FILL_LENGTH;
__linker_eth_tx_data_end = .;
}
McalRxDataSection : fill=FILL_PATTERN, align=128, load > DDR0_MCU_1_0, type = NOINIT
{
.=align(128);
__linker_eth_rx_data_start = .;
. += FILL_LENGTH;
*(ETH_RX_DATA_SECTION)
.=align(128);
. += FILL_LENGTH;
__linker_eth_rx_data_end = .;
}
} /* end of SECTIONS */
/*----------------------------------------------------------------------------*/
/* Misc linker settings */
/*-------------------------------- END ---------------------------------------*/
in this both cases our final output is matching but, we need to run our Freetos app faster for our desired output. since It is already in MSMC3 and we cant able to keep that in OCMC because of size issue.
As per our observation Freetos is much slower than tirtos when accessing memory locations as it is too slow when we keep our (.text) section in DDR whereas tirtos was far better. Am i right??
if you can suggest how to run our Freetos app faster, it would help us.
Regards
Madikanti Rohith.
Hi,
As per our observation Freetos is much slower than tirtos when accessing memory locations as it is too slow when we keep our (.text) section in DDR whereas tirtos was far better. Am i right??
I don't have data on this, I'll need to check this with the team.
we need to run our Freetos app faster for our desired output. since It is already in MSMC3 and we cant able to keep that in OCMC because of size issue.
You can break your .text section and keep some of your most commonly used APIs in OCMC. The same way you are doing with .bss:NDK_MMBUFFER in the linker file you shared. This should help with the speed. Also, you can use both MCU_OCRAM and MAIN_OCRAM for this.
Regards,
Parth
Hi ,
thanks for your reply,
I don't have data on this, I'll need to check this with the team.
please let us know if you get any info regarding this,
This should help with the speed. Also, you can use both MCU_OCRAM and MAIN_OCRAM for this.
We are currently using OCMC_RAM as in the linker file attached, so is it MCU RAM or MAIN RAM.
Also, if it is MCU RAM how can we use MAIN RAM in our case as our app is MCU R5 based.
Regards
Madikanti Rohith
Hi,
please let us know if you get any info regarding this,
Please expect a little delay in this, as most of the team is on vacation.
We are currently using OCMC_RAM as in the linker file attached, so is it MCU RAM or MAIN RAM.
Currently you are using MCU_OCRAM. There is a 512KB of OCRAM mapped at 0x3600000, which you should be able to use in the same way as you are using MCU_OCRAM in the linker.
Regards,
Parth
Hi ,
thanks for your reply
Currently you are using MCU_OCRAM. There is a 512KB of OCRAM mapped at 0x3600000, which you should be able to use in the same way as you are using MCU_OCRAM in the linker.
#one update,
we increased our OCRAM (like adjusted address) and kept our .text section in OCRAM and we got our desired result, but its a temporary solution for us . for our final desired output, we need to run linux and in upcoming updates of our app .text section will not fit in OCRAM. can you suggest any possible way to run it faster.
1)is there any way to run Freetos with ddr memory faster ?
2)is there any way to split our .text section into .text1 and .text2 so we can keep ,.text1 in MSMC and .text2 in OCMC .
if you can suggest any similar thing as I mentioned above can you give us a reference, or any input from your side .
Please expect a little delay in this, as most of the team is on vacation.
ok,like we wanted to know to run our application with Linux is it possible with Freetos or not, DDR is causing the problem as it is too slow with Freetos.
Regards
Madikanti Rohith
Hi,
is there any way to split our .text section into .text1 and .text2 so we can keep ,.text1 in MSMC and .text2 in OCMC .
Yes, you can do this as I mentioned in the previous post.
You can break your .text section and keep some of your most commonly used APIs in OCMC. The same way you are doing with .bss:NDK_MMBUFFER in the linker file you shared.
Regards,
Parth
