Other Parts Discussed in Thread: CDCE913, AMIC110, TLK110
I need to provide an EtherCAT interface between AM335X(to be configured as a slave) and an ethernet PHY (for example DP83826ERHBR). I using the TMDXICE3359(ICE development board) as a reference.
I have following questions on the reference design.
- I believe the use PRU-ICSS units of the AM335x is required to enable EtherCAT and to use the EtherCAT driver and ESC stack .The interface of PHY directly to EMAC(MII) is for Ethernet purposes. Please confirm.
- What is the purpose of using a bus switch(SN74CBTLV3257RGY) along with a muxing /ORing logic (SN74LVC1G32DCK). Can I avoid theses 2 chips to directly connect the ethernet PHY to PRU-ICSS units of the AM335x. I am using AM335X just as a slave.
- Does the XI clock input pins of both the PHYs need to be driven from the clock synthesizer(CDCE913) . Can't we use a local crystal for each PHY for EtherCAT functionality.