Ethernet PHY with AM335x as EtherCAT slave

Thanks Evan. I am using DP83826ERHBR. In some reference design for example TMDXICE3359(ICE development board), the XI clock input pins of both the PHYs are driven from the clock synthesizer(CDCE913) . Can't we use a local crystal for each PHY for an EtherCAT functionality.

Thanks Evan.

Your input was really helpful. What is the purpose of using a bus switch(SN74CBTLV3257RGY) along with a muxing /ORing logic (SN74LVC1G32DCK) when interfacing a PHY with AM335x as an ESC(for example in the TI reference design TMDXICE3359) .

Hi Jagbir,

Please try to consolidate similar queries to one thread. I have addressed this in the below thread:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1181565/ethercat-interface-between-am335x-and-an-ethernet-phy-request

Thank you,

Evan