TDA4VM: CSITX node, speed greater than 1000MBps cannot be set

Hi,

Could you please brief me how you are measuring the csi-tx speed? 

As the register value is updated correctly, would like to know about your environment and usecase for better understanding of the issue.

Regards,
Nikhil

Hi ,

Thanks for your reply.

Below is the sample code

vx_context csitx_context;
vx_graph csitx_graph;
vx_user_data_object csitx_param;
vx_node csitx_node;
vx_object_array csitx_arr[2];

int32_t csitx_init()
{
    vx_image tmp_csitx_in = vxCreateImage(csitx_context, camera_width, camera_height, VX_DF_IMAGE_UYVY);
    for (uint32_t buf_id = 0; buf_id < 2; buf_id++){
        csitx_arr[buf_id]= vxCreateObjectArray(csitx_context, (vx_reference)tmp_csitx_in, 1);
    }
    vxReleaseImage(&tmp_csitx_in);

    tivx_csitx_params_t local_csitx_config;
    tivx_csitx_params_init(&local_csitx_config);
    local_csitx_config.numInst                          = 1U;
    local_csitx_config.numCh                            = 1;
    local_csitx_config.instId[0U]                       = 0;
    local_csitx_config.instCfg[0U].rxCompEnable         = (uint32_t)vx_true_e;
    local_csitx_config.instCfg[0U].rxv1p3MapEnable      = (uint32_t)vx_true_e;
    local_csitx_config.instCfg[0U].vBlank               = 0;
    local_csitx_config.instCfg[0U].hBlank               = 0;
    local_csitx_config.instCfg[0U].laneBandSpeed        = CSITX_LANE_BAND_SPEED_1200_TO_1400_MBPS;
    local_csitx_config.instCfg[0U].numDataLanes         = 4U;
    for (int loopCnt = 0U; loopCnt < local_csitx_config.instCfg[0U].numDataLanes; loopCnt++)
    {
        local_csitx_config.instCfg[0U].lanePolarityCtrl[loopCnt] = 0u;
    }
    for (int loopCnt = 0U; loopCnt < 1; loopCnt++)
    {
        local_csitx_config.chVcNum[loopCnt]   = loopCnt;
        local_csitx_config.chInstMap[loopCnt] = 0;
    }
    csitx_param = vxCreateUserDataObject(csitx_context, "tivx_csitx_params_t", sizeof(tivx_csitx_params_t), &local_csitx_config);
    csitx_node = tivxCsitxNode(csitx_graph, csitx_param, csitx_arr[0]);
    vxSetNodeTarget(csitx_node , VX_TARGET_STRING, TIVX_TARGET_CSITX);

    vx_graph_parameter_queue_params_t graph_parameters_queue_params_list[1];
    vx_parameter parameter;  
    parameter = vxGetParameterByIndex(csitx_node, 1);
    vxAddParameterToGraph(csitx_graph, parameter);
    vxReleaseParameter(&parameter);

    graph_parameters_queue_params_list[0].graph_parameter_index = 0;
    graph_parameters_queue_params_list[0].refs_list_size = 2;
    graph_parameters_queue_params_list[0].refs_list = (vx_reference*) & (csitx_arr[0]);

    vxSetGraphScheduleConfig(csitx_graph,
                             VX_GRAPH_SCHEDULE_MODE_QUEUE_AUTO,
                             1,
                             graph_parameters_queue_params_list);    
    vxVerifyGraph(csitx_graph);

    vxGraphParameterEnqueueReadyRef(csitx_graph, 0, (vx_reference*)&csitx_arr[0], 1);
    vxGraphParameterEnqueueReadyRef(csitx_graph, 0, (vx_reference*)&csitx_arr[1], 1);
}

uint64_t getTickCountMs()
{
    struct timespec ts;

    clock_gettime(CLOCK_MONOTONIC, &ts);

    return (ts.tv_sec * 1000 + ts.tv_nsec / 1000000);
}

int main(int argc, char *argv[])
{
    vx_object_array transmitted_frames = NULL;
    csitx_init();
    while(1){
        printf("csitx start %ld\n", getTickCountMs());
        vxGraphParameterDequeueDoneRef(csitx_graph, 0, (vx_reference*)&transmitted_frames, 1, &num_refs);
        vxGraphParameterEnqueueReadyRef(csitx_graph, 0, (vx_reference*)&transmitted_frames, 1);
    }
}

I think that when the resolution remains the same, as the lanebandspeed increases, the time between two while loops is shorter,
but it doesn't when I set lanebandspeed higher than CSITX_LANE_BAND_SPEED_950_TO_1000_MBPS.

I also did another test, calling vxGraphParameterDequeueDoneRef every 33ms, and then measuring the mipi data lane with an 
oscilloscope. When the lanebandspeed higher than 1000MBPS, the idle time between two frames on the data lane no longer increases.

Regards,

wang yu

Hi Wang yu,

Thank you for sharing the application.

I tested your application on SDK 8.4 and the time between two while loops is shorter when I set lanebandspeed higher than CSITX_LANE_BAND_SPEED_950_TO_1000_MBPS

The patch you have applied in the driver changes.
Could you please confirm if you have done the changes on tiovx side too?

If yes, could you please share those changes?

Regards,
Nikhil

Hi,

Sorry, I have not modified tiovx side code，Please share the patch with me, thanks.

Hi,

Please find the patch for TIOVX below

/cfs-file/__key/communityserver-discussions-components-files/791/0001_2D00_CSITX_2D00_TIOVX_2D00_DRV_2D00_Bug_2D00_Fix_2D00_PDK_2D00_9694_2D00_CSITX_2D00_supports_2D00_only.patch

Regards,
Nikhil

Hi,

I have applied this patch, but the result is still the same.

On the other hand, when I change the laneBandSpeed, the register 0x04480f04 is also changed.

Does it mean that my settings have taken effect?

If yes, Why is the rate of DPHY not increasing?

Regards,

wang yu

Hi Nikhil,

I also tested this application on SDK8.4。But I got the same result as SDK7.2。

Set lanebandspeed  TIVX_CSITX_LANE_BAND_SPEED_950_TO_1000_MBPS to 

Could it be a hardware problem? Our SOC version is TDA4VM88TGBALFR.

Regards,

wang yu

Hi,

I tested your application on SDK 8.4

Below are my observation regarding the time between two while loop iterations.

TIVX_CSITX_LANE_BAND_SPEED_770_TO_870_MBPS      13 - 14 msec
TIVX_CSITX_LANE_BAND_SPEED_950_TO_1000_MBPS    11 msec
TIVX_CSITX_LANE_BAND_SPEED_1200_TO_1400_MBPS   9 - 10 msec
TIVX_CSITX_LANE_BAND_SPEED_1800_TO_2000_MBPS   7 - 8 msec
TIVX_CSITX_LANE_BAND_SPEED_2200_TO_2500_MBPS   7 msec

Is this same observation you are getting?

Is this issue observed on the EVM? It would be great if you could try the same on the EVM.

Regards,
Nikhil

Hi Nikhil,

I got the same observation on EVM.

I noticed a problem, does the time between the two loops seem a bit long?

We need to transmit 4096x2560 30fps with csitx, but it takes 34ms when

I set lanebandspeed to TIVX_CSITX_LANE_BAND_SPEED_2200_TO_2500_MBPS 。

It can't reach 30fps。

And in theory, lanebandspeed should only need 1800MBps to meet this requirement。

Where is the performance bottleneck? Is there a way to improve it?

Regards,

wang yu

Hi Wang yu,

I have raised this as a performance bottleneck issue internally.
Placing the jira link below for TI's internal purpose

https://jira.itg.ti.com/browse/PDK-12540

We shall look into this and get back to you regarding the reason for this timing issue.

Regards,
Nikhil

Hi Wang yu,

The latest update internally is that this issue shall be fixed in SDK 9.0, which would released in the month of August.

Regards,
Nikhil