Hi,
The AM62x TRM says GPIO0 has 87 pins and GPIO1 has 88 pins.
But In Section 6.3.10 of the am625 Datasheet, MAIN Domain GPIO0 has 92 pins, GPIO0_ 0 -- GPIO0_ 91 and GPIO1 has 52 pins, GPIO1_ 0 -- GPIO1_ 51.
Why?
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Hi,
The AM62x TRM says GPIO0 has 87 pins and GPIO1 has 88 pins.
But In Section 6.3.10 of the am625 Datasheet, MAIN Domain GPIO0 has 92 pins, GPIO0_ 0 -- GPIO0_ 91 and GPIO1 has 52 pins, GPIO1_ 0 -- GPIO1_ 51.
Why?
Hello li fan,
Thank you for the Query.
Looks like the block diagram in the TRM and the relevant section has been used from AM64.
Please refer the datasheet for the number of IOs.
I will check internally and update you on the findings.
Please expect a delay in response due to the upcoming yearend holiday.
Regards,
Sreenivasa
Hello li fan,
Thank you for the inputs and noted.
Not sure if these are due to reuse, need to check internally.
As i said, the datasheet can be used as the reference for now.
I will check internally with the team and update you.
Regards,
Sreenivasa
Hello li fan,
Can you pls confirm you are using the latest version of the TRM on TI.com
Pls share the picture diagram reference.
Regards,
Sreenivasa
Hello li fan,
Thank you for the inputs.
Please confirm the version you are using.
AM62x Processors Silicon Revision 1.0
SPRUIV7A – MAY 2022 – REVISED NOVEMBER 2022
Regards,
Sreenivasa
Hello li fan,
Thank you for using the latest version.
In the latest version you can see 144 as the total available IOs and it should be matching the datasheet.
The representation is shown as generic and for numbers the datasheet has to be reference.
Can you pls check the uboot dtsi.
Regards,
Sreenivasa
Hello li fan,
Thank you for the inputs.
I will provide the feedback to the design team.
Please continue to use the TRM for description and the datasheet for the GPIO numbers.
Regards,
Sreenivasa